| Pt. I | Nano-computing at the physical layer | 3 |
| 1 | Nanometer scale technologies : device considerations | 5 |
| Pt. II | Defect tolerant nano-computing | 37 |
| 2 | Nanocomputing in the presence of defects and faults : a survey | 39 |
| 3 | Defect tolerance at the end of the roadmap | 73 |
| 4 | Obtaining quadrillion-transistor logic systems despite imperfect manufacture, hardware failure, and incomplete system specification | 109 |
| 5 | A probabilistic-based design for nanoscale computation | 133 |
| 6 | Evaluating reliability trade-offs for nano-architectures | 157 |
| 7 | Law of large numbers system design | 213 |
| Pt. III | Nano-scale quantum computing | 245 |
| 8 | Challenges in reliable quantum computing | 247 |
| 9 | Origins and motivations for design rules in QCA | 267 |
| 10 | Partitioning and placement for buildable QCA circuits | 295 |
| Pt. IV | Validation of nano-scale architectures | 321 |
| 11 | Verification of large scale nano systems with unreliable nano devices | 323 |