Upgrading and Repairing PCs, 17th Edition by Scott Mueller

From Barnes & Noble

The Barnes & Noble Review
Year after year, Scott Mueller brings together more comprehensive, useful information about PC hardware, repair, maintenance, and upgrades than anyone else, bar none.

Mueller's legendary Upgrading & Repairing PCs, now in its 17th edition, is replete with new coverage. Including, for instance, a complete guide to Intel and AMD's new dual-core processors, the newest chipsets, and today's state-of-the-art video cards. (For the performance freaks among you, there's also a full chapter on overclocking and system cooling.)

In nearly 1,600 pages of small print and great technical illustrations, Mueller has room for nearly everything: motherboards, BIOSes, memory, disks, interfaces, removable storage, video, audio, USB, Internet connectivity, LANs, power, and more. There's even more information on the DVD: from coverage of notebooks and printers to complete PDFs of Mueller's last eight editions.

Our favorite feature: a detailed and up-to-date troubleshooting index that identifies hundreds of common hardware problems, offers likely causes and solutions in a quick phrase or two, and points you to more detailed coverage inside. Audio card sounds weird? Computers invisible on the network? USB peripherals not recognized? Wireless keyboard doesn't work? You'll be on the road to a solution within seconds.

Finally, Mueller's DVD contains two full hours of all-new digital video. (He takes pride in reshooting for every edition: These are today's PC maintenance and repair techniques, not Pleistocene-era stuff.) Best of all, it'll run on your home DVD player, too. (Hey, when are you more likely to need help than when your PC isn't working?)

This classic has spawned an entire series, from Upgrading and Repairing Networks, Fifth Edition to Upgrading and Repairing Microsoft Windows. But it all started here. And, after 17 editions, Mueller's flagship book is better than ever. Bill Camarda, from the May 2006 Read Only

From the Publisher

Be a part of the best-selling Upgrading and Repairing series with the latest edition of the flagship book, Upgrading and Repairing PCs. Author Scott Mueller has taught thousands in his seminars and millions through his books, videos and articles. Since 1988, everyon from PC technicians and students to hobbyists, have turned to Scott Mueller's Upgrading and Repairing PCs books for help with computer problems. Upgrading and Repairing PCs, 17th Edition includes new and updated content covering the latest processors, motherboards, memory, and more, including a fully-loaded DVD with new video and reference material.

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Booknews

Necessarily subject to frequent new editions, this hefty manual discusses all areas of computer system improvement—upgrading, repairing, maintaining, and troubleshooting—as well as software issues. Mueller, president of an international research and corporate training firm, presents 25 chapters covering state-of-the-art hardware and accessories and discussing the fine points of motherboards, processors, memory, and case and power-supply improvements; proper system and component care; diagnostics hardware and software; and the important differences between major system architectures from the original Industry Standard Architecture to the latest in PCI and AGP systems. The included CD-ROM conteains some two hours of how-to video with the author. Annotation c. Book News, Inc., Portland, OR (booknews.com)

Booknews

Includes information from the most basic, such as how to get into a computer, to fairly technical specifications of various components. Generally focuses on determining whether upgrading or repairing is a good idea and if so finding the best way. Includes primary components, input/output hardware, mass storage, system maintenance, troubleshooting, and applications. The accompanying CD-ROM contains searchable versions of six technical books. The explanations and suggestions are applicable to any type and brand of personal computer. Includes a glossary without pronunciation. No bibliography. New editions have come out frequently since the first in 1988. Annotation c. by Book News, Inc., Portland, Or.

Booknews

Already in the fourth printing of its updated third edition, clearly a popular reference. For simple users of computers who want to learn to update and repair IBM-type personal computers for themselves or their companies, not only explains the details of specific procedures, but also provides the background information needed to become technically informed enough to perform them. Not advanced enough to prepare readers to become professionals. Annotation c. Book News, Inc., Portland, OR (booknews.com)

Product Details

• Table of Contents
• Forewords & Introductions
• Read an Excerpt

Table of Contents

Forewords & Introductions

Microprocessors

The brain or engine of the PC is the processor (sometimes called microprocessor), or central processing unit (CPU). The CPU performs the system's calculating and processing. The processor is often the most expensive single component in the system; in higher-end systems it can cost up to four or more times more than the motherboard it plugs into. Intel is generally credited with creating the first microprocessor in 1971 with the introduction of a chip called the 4004. Today Intel still has control over the processor market, at least for PC systems. This means that all PC-compatible systems use either Intel processors or Intel-compatible processors from a handful of competitors (such as AMD or VIA/Cyrix).

Intel's dominance in the processor market hadn't always been assured. Although Intel is generally credited with inventing the processor and introducing the first one on the market, by the late 1970s the two most popular processors for PCs were not from Intel (although one was a clone of an Intel processor). Personal computers of that time primarily used the Z-80 by Zilog and the 6502 by MOS Technologies. The Z-80 was noted for being an improved and less expensive clone of the Intel 8080 processor, similar to the way companies today such as AMD, Cyrix, IDT, and Rise Technologies have cloned Intel's Pentium processors. In that case, though, the clone had become more popular than the original. Some might argue that AMD has achieved that type of status over the past year, but even though they have made significant gains, Intel still runs the PC processor show.

Back then I had a system containing both of thoseprocessors, consisting of a 1MHz (yes, that's 1, as in 1MHz!) 6502-based Apple main system with a Microsoft Softcard (Z-80 card) plugged into one of the slots. The Softcard contained a 2MHz Z-80 processor. This enabled me to run software for both types of processors on the one system. The Z-80 was used in systems of the late 1970s and early 1980s that ran the CP/M operating system, whereas the 6502 was best known for its use in the early Apple computers (before the Mac).

The fate of both Intel and Microsoft was dramatically changed in 1981 when IBM introduced the IBM PC, which was based on a 4.77MHz Intel 8088 processor running the Microsoft Disk Operating System (MS-DOS) 1.0. Since that fateful decision was made, PC-compatible systems have used a string of Intel or Intel-compatible processors, with each new one capable of running the software of the processor before it—from the 8088 to the current Pentium 4/III/Celeron and Athlon/Duron. The following sections cover the various types of processor chips that have been used in personal computers since the first PC was introduced almost two decades ago. These sections provide a great deal of technical detail about these chips and explain why one type of CPU chip can do more work than another in a given period of time.

Pre-PC Microprocessor History

It is interesting to note that the microprocessor had existed for only 10 years prior to the creation of the PC! The microprocessor was invented by Intel in 1971; the PC was created by IBM in 1981. Now nearly 20 years later, we are still using systems based more or less on the design of that first PC. The processors powering our PCs today are still backward compatible in many ways with the 8088 selected by IBM in 1981.

The story of the development of the first microprocessor, the Intel 4004, can be read in Chapter 1, "Personal Computer Background." The 4004 processor was introduced on November 15, 1971, and originally ran at a clock speed of 108KHz (108,000 cycles per second, or just over one-tenth a megahertz). The 4004 contained 2,300 transistors and was built on a 10-micron process. This means that each line, trace, or transistor could be spaced about 10 microns (millionths of a meter) apart. Data was transferred 4 bits at a time, and the maximum addressable memory was only 640 bytes. The 4004 was designed for use in a calculator but proved to be useful for many other functions because of its inherent programmability.

In April 1972, Intel released the 8008 processor, which originally ran at a clock speed of 200KHz (0.2MHz). The 8008 processor contained 3,500 transistors and was built on the same 10-micron process as the previous processor. The big change in the 8008 was that it had an 8-bit data bus, which meant it could move data 8 bits at a time—twice as much as the previous chip. It could also address more memory, up to 16KB. This chip was primarily used in dumb terminals and general-purpose calculators.

The next chip in the lineup was the 8080, introduced in April 1974, running at a clock rate of 2MHz. Due mostly to the faster clock rate, the 8080 processor had 10 times the performance of the 8008. The 8080 chip contained 6,000 transistors and was built on a 6-micron process. Similar to the previous chip, the 8080 had an 8-bit data bus, so it could transfer 8 bits of data at a time. The 8080 could address up to 64KB of memory, significantly more than the previous chip. It was the 8080 that helped start the PC revolution because this was the processor chip used in what is generally regarded as the first personal computer, the Altair 8800. The CP/M operating system was written for the 8080 chip, and Microsoft was founded and delivered its first product: Microsoft BASIC for the Altair. These initial tools provided the foundation for a revolution in software because thousands of programs were written to run on this platform. In fact, the 8080 became so popular that it was cloned. A company called Zilog formed in late 1975, joined by several ex-Intel 8080 engineers. In July of 1976, it released the Z-80 processor, which was a vastly improved version of the 8080. It was not pin compatible but instead combined functions such as the memory interface and RAM refresh circuitry, which enabled cheaper and simpler systems to be designed. The Z-80 also incorporated a superset of 8080 instructions, meaning it could run all 8080 programs. It also included new instructions and new internal registers, so software designed for the Z-80 would not necessarily run on the older 8080. The Z-80 ran initially at 2.5MHz (later versions ran up to 10MHz) and contained 8,500 transistors. The Z-80 could access 64KB of memory. Radio Shack selected the Z-80 for the TRS-80 Model 1, its first PC. The chip also was the first to be used by many pioneering systems, including the Osborne and Kaypro machines. Other companies followed, and soon the Z-80 was the standard processor for systems running the CP/M operating system and the popular software of the day.

Intel released the 8085, its followup to the 8080, in March of 1976. Even though it predated the Z-80 by several months, it never achieved the popularity of the Z-80 in personal computer systems. It was popular as an embedded controller, finding use in scales and other computerized equipment. The 8085 ran at 5MHz and contained 6,500 transistors. It was built on a 3-micron process and incorporated an 8-bit data bus.

Along different architectural lines, MOS Technologies introduced the 6502 in 1976. This chip was designed by several ex-Motorola engineers who had worked on Motorola's first processor, the 6800. The 6502 was an 8-bit processor like the 8080, but it sold for around $25, whereas the 8080 cost about $300 when it was introduced. The price appealed to Steve Wozniak, who placed the chip in his Apple I and Apple II designs. The chip was also used in systems by Commodore and other system manufacturers. The 6502 and its successors were also used in computer games, including the original Nintendo Entertainment System (NES) among others. Motorola went on to create the 68000 series, which became the basis for the Apple Macintosh line of computers. Today those systems use the PowerPC chip, also by Motorola and a successor to the 68000 series.

All these previous chips set the stage for the first PC chips. Intel introduced the 8086 in June 1978. The 8086 chip brought with it the original x86 instruction set that is still present on x86-compatible chips such as the Pentium 4. A dramatic improvement over the previous chips, the 8086 was a full 16-bit design with 16-bit internal registers and a 16-bit data bus. This meant that it could work on 16-bit numbers and data internally and also transfer 16 bits at a time in and out of the chip. The 8086 contained 29,000 transistors and initially ran at up to 5MHz. The chip also used 20-bit addressing, so it could directly address up to 1MB of memory. Although not directly backward compatible with the 8080, the 8086 instructions and language were very similar and enabled older programs to quickly be ported over to run. This later proved important to help jumpstart the PC software revolution with recycled CP/M (8080) software. Although the 8086 was a great chip, it was expensive at the time and more importantly required an expensive 16-bit support chip and board design. To help bring costs down, in 1979, Intel released a crippled version of the 8086 called the 8088. The 8088 processor used the same internal core as the 8086, had the same 16-bit registers, and could address the same 1MB of memory, but the external data bus was reduced to 8 bits. This enabled support chips from the older 8-bit 8085 to be used, and far less expensive boards and systems could be made. It is for these reasons that IBM chose the crippled chip, the 8088, for the first PC.

This decision would affect history in several ways. The 8088 was fully software compatible with the 8086, so it could run 16-bit software. Also, because the instruction set was very similar to the previous 8085 and 8080, programs written for those older chips could be quickly and easily modified to run. This enabled a large library of programs to be quickly released for the IBM PC, thus helping it become a success. The overwhelming blockbuster success of the IBM PC left in its wake the legacy of requiring backward compatibility with it. To maintain the momentum, Intel has pretty much been forced to maintain backward compatibility with the 8088/8086 in most of the processors it has released since then. In some ways the success of the PC, and the Intel architecture it contains, has limited the growth of the personal computer. In other ways, however, its success has caused a huge number of programs, peripherals, and accessories to be developed and the PC to become a de facto standard in the industry. The original 8088 processor used in the first PC contained close to 30,000 transistors and ran at less than 5MHz. Intel introduced one version of the Pentium III Xeon with 2MB of on-die cache that has a whopping 140 million transistors—the largest ever in a single processor chip. Intel has also released processors running at speeds of 2GHz and beyond, and AMD is not very far behind. And the progress doesn't stop there because, according to Moore's Law, processing speed and transistor counts are doubling every 1.5–2 years.

Processor Specifications

Many confusing specifications often are quoted in discussions of processors. The following sections discuss some of these specifications, including the data bus, address bus, and speed. The next section includes a table that lists the specifications of virtually all PC processors.

Processors can be identified by two main parameters: how wide they are and how fast they are. The speed of a processor is a fairly simple concept. Speed is counted in megahertz (MHz) and gigahertz (GHz), which means millions and billions, respectively, of cycles per second—and faster is better! The width of a processor is a little more complicated to discuss because three main specifications in a processor are expressed in width. They are

Internal registers

Data input and output bus

Memory address bus

Systems below 16MHz usually had no cache memory at all. Starting with 16MHz systems, high-speed cache memory appeared on the motherboard because the main memory at the time could not run at 16MHz. Prior to the 486 processor, the cache on the motherboard was the only cache used in the system.

Starting with the 486 series, processors began including what was called Level 1 (L1) cache directly on the processor die. Therefore, the L1 cache always ran at the full speed of the chip, especially important when the later 486 chips began to run at speeds higher than the motherboards they were plugged into. During this time the cache on the motherboard was called the second level, or L2, cache and ran at the slower motherboard speed.

Starting with the Pentium Pro and Pentium II, Intel began including L2 cache memory chips directly within the same package as the main processor. Originally, this built-in L2 cache was implemented as physically separate chips contained within the processor package but not a part of the processor die. Because the speed of commercially available cache memory chips could not keep pace with the main processor, most of the L2 cache in these processors ran at one-half speed (Pentium II/III and AMD Athlon), whereas some ran the cache even slower—at two-fifths or even one-third the processor speed (AMD Athlon).

The original Pentium II, III, Celeron, and Athlon (Model 1 and 2) processors use 512KB of either one-half, two-fifths, or one-third speed L2 cache, as Table 3.1 shows.

Table 3.1 L2 Cache Speeds
ProcessorSpeedL2 SizeL2 TypeL2 Speed
Pentium III450–600MHz512KBExternal1/2 core (225–300MHz)
Athlon550–700MHz512KBExternal1/2 core (275–350MHz)
Athlon750–850MHz512KBExternal2/5 core (300–340MHz)
Athlon900–1000MHz512KBExternal1/3 core (300–333MHz)

The Pentium Pro, Pentium II/III Xeon, newer Pentium III, Celeron, K6-3, Athlon (Model 4, codenamed Thunderbird), and Duron processors include full-core speed L2, as shown in Table 3.2.

Table 3.2 Full-Core Speed Cache
ProcessorSpeedL2 SizeL2 TypeL2 Speed
Pentium Pro150–200MHz256KB–1MBExternalFull core
K6-3350–450MHz256KBOn-dieFull core
Duron550–700+MHz64KBOn-dieFull core
Celeron300–600+MHz128KBOn-dieFull core
Pentium II Xeon400–450MHz512KB–2MBExternalFull core
Athlon650–1000+MHz256KBOn-dieFull core
Pentium III500–1000+MHz256KBOn-dieFull core
Pentium III Xeon500–1000+MHz256KB–2MBOn-dieFull core
Pentium 41.3–2.0+GHz256KBOn-dieFull core
Xeon1.4–2.0+GHz256KB–1MBOn-dieFull core

The problem originally forcing the L2 cache to run at less than the processor core speed was simple: The cache chips available on the market simply couldn't keep up. Intel built its own high-speed cache memory chips for the earlier Xeon processors, but it also made them very expensive. A breakthrough occurred in the second-generation Celeron, in which Intel built both the L1 and L2 caches directly on the processor die, where they both ran at the full-core speed of the chip. This type of design was then quickly adopted by the second-generation Pentium III, as well as the AMD K6-3, Athlon, and Duron processors. In fact, virtually all future processors from Intel and AMD have adopted or will adopt on-die L2 cache because it is the only cost-effective way to include the L2 and increase the speed.

Table 3.3 lists the primary specifications for the Intel family of processors used in IBM and compatible PCs. Table 3.4 lists the Intel-compatible processors from AMD, Cyrix, NexGen, IDT, and Rise.

Table 3.3 Intel Processor Specifications
ProcessorCPU ClockVoltageInternal Register SizeData Bus WidthMax.
MemoryLevel 1 CacheL1 Cache TypeLevel 2 CacheL2 Cache SpeedIntegral
FPUMultimedia InstructionsNo. of TransistorsDate Introduced
80881x5v16-bit8-bit1MB——————29,000June '79
80861x5v16-bit16-bit1MB——————29,000June '78
2861x5v16-bit16-bit16MB——————134,000Feb. '82
386SX1x5v32-bit16-bit16MB———Bus——275,000June '88
386SL1x3.3v32-bit16-bit16MB0KB1WT—Bus——855,000Oct. '90
386DX1x5v32-bit32-bit4GB———Bus——275,000Oct. '85
486SX1x5v32-bit32-bit4GB8KBWT—Bus——1.185MApril '91
486SX22x5v32-bit32-bit4GB8KBWT—Bus——1.185MApril '94
487SX1x5v32-bit32-bit4GB8KBWT—BusYes—1.2MApril '91
486DX1x5v32-bit32-bit4GB8KBWT—BusYes—1.2MApril '89
486SL21x3.3v32-bit32-bit4GB8KBWT—BusOpt.—1.4MNov. '92
486DX22x5v32-bit32-bit4GB8KBWT—BusYes—1.2MMarch '92
486DX42-3x3.3v32-bit32-bit4GB16KBWT—BusYes—1.6MFeb. '94
486Pentium OD2.5x5v32-bit32-bit4GB2x16KBWB—BusYes—3.1MJan. '95
Pentium 60/661x5v32-bit64-bit4GB2x8KBWB—BusYes—3.1MMarch '93
Pentium 75-2001.5–3x3.3–3.5v32-bit64-bit4GB2x8KBWB—BusYes—3.3MOct. '94
Pentium MMX1.5–4.5x1.8–2.8v32-bit64-bit4GB2x16KBWB—BusYesMMX4.5MJan. '97
Pentium Pro2–3x3.3v32-bit64-bit64GB2x8KBWB256KB 512KB 1MBCoreYes—5.5MNov.
'95
Pentium II3.5–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB_ CoreYesMMX7.5MMay
'97
Pentium II PE3.5–6x1.6v32-bit64-bit64GB2x16KBWB256KBCore3YesMMX27.4MJan.
'99
Celeron3.5–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB0KB—YesMMX7.5MApril '98
Celeron A3.5–8x1.5–2v32-bit64-bit64GB2x16KBWB128KBCore3YesMMX19MAug. '98
Celeron
III4.5–9x1.3–1.6v32-bit64-bit64GB2x16KBWB128KBCore3YesSSE28.1M4Feb. '00
Pentium III4–6x1.8–2v32-bit64-bit64GB2x16KBWB512KB_ CoreYesSSE9.5MFeb. '99
Pentium IIIE4–9x1.3–1.7v32-bit64-bit64GB2x16KBWB256KBCore3YesSSE28.1MOct.
'99
Pentium II Xeon4–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB 1MB
2MBCoreYesMMX7.5MApril '98
Pentium III Xeon5–6x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB 1MB
2MBCoreYesSSE9.5MMarch '99
Pentium IIIE Xeon4.5–6.5x1.65v32-bit64-bit64GB2x16KBWB256KB 1MB
2MBCore3YesSSE28.1M
84M
140MOct. '99 May '00
Pentium 43–5x1.7v32-bit64-bit64GB12+8KBWB256KBCore3YesSSE242MNov. '00
Pentium 4 Xeon3–5x1.7v32-bit64-bit64GB12+8KBWB256KBCore3YesSSE242MMay '01
Itanium3–5x1.6v64-bit64-bit16TB2x16KBWB96KB5Core3YesMMX25MMay '01

Table 3.4 AMD, Cyrix, NexGen, IDT, and Rise Processors
ProcessorCPU ClockVoltageInternal Register SizeData Bus WidthMax.
MemoryLevel 1 CacheL1 Cache TypeLevel 2 CacheL2 Cache SpeedIntegral
FPUMultimedia InstructionsNo. of TransistorsDate Introduced
AMD K51.5–1.75x3.5v32-bit64-bit4GB16+8KBWB—BusYes—4.3MMarch '96
AMD K62.5–4.5x2.2–3.2v32-bit64-bit4GB2x32KBWB—BusYesMMX8.8MApril '97
AMD K6-22.5–6x1.9–2.4v32-bit64-bit4GB2x32KBWB—BusYes3DNow9.3MMay '98
AMD K6-33.5–4.5x1.8–2.4v32-bit64-bit4GB2x32KBWB256KBCore3Yes3DNow21.3MFeb.
'99
AMD Athlon5–10x1.6–1.8v32-bit64-bit8TB2x64KBWB512KB1/2–1/3 coreYesEnh.
3DNow22MJun. '99
AMD Duron5–10x1.5–1.8v32-bit64-bit8TB2x64KBWB64KBCore3YesEnh. 3DNow25MJune
'00
AMD Athlon 45–10x1.5–1.8v32-bit64-bit8TB2x64KBWB256KBCore3YesEnh.
3DNow37MJune '00
Cyrix 6x862x2.5–3.5v32-bit64-bit4GB16KBWB—BusYes—3MFeb. '96
Cyrix 6x86MX/MII2–3.5x2.2–2.9v32-bit64-bit4GB64KBWB—BusYesMMX6.5MMay '97
Cyrix III2.5–7x2.2v32-bit64-bit4GB64KBWB256KBCore3Yes3Dnow22MFeb. '00
NexGen Nx5862x4v32-bit64-bit4GB2x16KBWB—BusYes—3.5MMarch '94
IDT Winchip3–4x3.3–3.5v32-bit64-bit4GB2x32KBWB—BusYesMMX5.4MOct. '97
IDT Winchip2/2A2.33–4x3.3–3.5v32-bit64-bit4GB2x32KBWB—BusYes3Dnow5.9MSept.
'98
Rise mP62–3.5x2.8v32-bit64-bit4GB2x8KBWB—BusYesMMX3.6MOct. '98

FPU = Floating-Point unit (internal math coprocessor)

WT = Write-Through cache (caches reads only)

WB = Write-Back cache (caches both reads and writes)

M = Millions

Bus = Processor external bus speed (motherboard speed)

Core = Processor internal core speed (CPU speed)

MMX = Multimedia extensions, 57 additional instructions for graphics and sound processing

3DNow = MMX plus 21 additional instructions for graphics and sound processing Enh. 3DNow = 3DNow plus 24 additional instructions for graphics and sound processing

SSE = Streaming SIMD (single instruction multiple data) Extensions, MMX plus 70 additional instructions for graphics and sound processing

SSE2 = Streaming SIMD Extensions 2, SSE plus 144 additional instructions for graphics and sound processing

1. The 386SL contains an integral-cache controller, but the cache memory must be provided outside the chip.

2. Intel later marketed SL Enhanced versions of the SX, DX, and DX2 processors. These processors were available in both 5v and 3.3v versions and included power-management capabilities.

3. On-die integrated L2 cache—runs at full-core speed.

4. 128KB functional L2 cache (256KB total, 128KB disabled); uses same die as Pentium IIIE.

5. The Itanium also includes an additional 2MB (150M transistors) or 4MB (300M transistors) of integrated on-cartridge L3 cache running at full core speed.

Note
Note in Table 3.3 that the Pentium Pro processor includes 256KB, 512KB, or 1MB
of full-core speed L2 cache in a separate die within the chip. The Pentium
II/III processors include 512KB of half-core speed L2 cache on the processor
card. The Celeron, Pentium II PE, and Pentium IIIE processors include
full-core speed L2 cache integrated directly within the processor die. The
Celeron III uses the same die as the Pentium IIIE, but half of the on-die
cache is disabled, leaving 128KB functional.

The transistor count figures do not include the external (off-die) 256KB,
512KB, 1MB, or 2MB L2 cache built into the Pentium Pro, Pentium II/III, Xeon,
and AMD Athlon CPU packages, or the 2MB or 4MB of L3 cache in the Itanium. The
external L2 cache in those processors contains an additional 15.5 (256KB), 31
(512KB), 62 million (1MB), or 124 million (2MB) transistors in separate chips,
whereas the external 2MB or 4MB of L3 cache in the Itanium includes up to 300
million transistors!

Note in Table 3.4 that the Athlon includes either 512KB of L2 cache via
separate chips, running at either one-half, two-fifths, or one-third the core
speed, or 256KB of on-die L2 running at full-core speed, depending on which
version you have.

Processor Speed Ratings

A common misunderstanding about processors is their different speed ratings. This section covers processor speed in general and then provides more specific information about Intel processors.

A computer system's clock speed is measured as a frequency, usually expressed as a number of cycles per second. A crystal oscillator controls clock speeds using a sliver of quartz sometimes contained in what looks like a small tin container. Newer systems include the oscillator circuitry in the motherboard chipset, so it might not be a visible separate component on newer boards. As voltage is applied to the quartz, it begins to vibrate (oscillate) at a harmonic rate dictated by the shape and size of the crystal (sliver). The oscillations emanate from the crystal in the form of a current that alternates at the harmonic rate of the crystal. This alternating current is the clock signal that forms the time base on which the computer operates. A typical computer system runs millions of these cycles per second, so speed is measured in megahertz. (One hertz is equal to one cycle per second.) An alternating current signal is like a sine wave, with the time between the peaks of each wave defining the frequency (see Figure 3.1).

Figure 3.1

Alternating current signal showing clock cycle timing.

Note

The hertz was named for the German physicist Heinrich Rudolf Hertz. In 1885,
Hertz confirmed the electromagnetic theory, which states that light is a form
of electromagnetic radiation and is propagated as waves.

A single cycle is the smallest element of time for the processor. Every action requires at least one cycle and usually multiple cycles. To transfer data to and from memory, for example, a modern processor such as the Pentium III needs a minimum of three cycles to set up the first memory transfer and then only a single cycle per transfer for the next three to six consecutive transfers. The extra cycles on the first transfer typically are called wait states. A wait state is a clock tick in which nothing happens. This ensures that the processor isn't getting ahead of the rest of the computer.

See "SIMMs, DIMMs, and RIMMs."

The time required to execute instructions also varies:

8086 and 8088. The original 8086 and 8088 processors take an average of 12
cycles to execute a single instruction.

286 and 386. The 286 and 386 processors improve this rate to about 4.5 cycles
per instruction.

486. The 486 and most other fourth-generation Intel-compatible processors,
such as the AMD 5x86, drop the rate further, to about 2 cycles per instruction.

Pentium, K6 series. The Pentium architecture and other fifth-generation
Intel-compatible processors, such as those from AMD and Cyrix, include twin
instruction pipelines and other improvements that provide for operation at one
or two instructions per cycle.

Pentium Pro, Pentium II/III/Celeron, and Athlon/Duron. These P6 class
processors, as well as other sixth-generation processors such as those from

AMD and Cyrix, can execute as many as three or more instructions per cycle.

Different instruction execution times (in cycles) make comparing systems based purely on clock speed or number of cycles per second difficult. How can two processors that run at the same clock rate perform differently with one running "faster" than the other? The answer is simple: efficiency.

The main reason the 486 was considered fast relative to a 386 is that it executes twice as many instructions in the same number of cycles. The same thing is true for a Pentium; it executes about twice as many instructions in a given number of cycles as a 486. Therefore, given the same clock speed, a Pentium is twice as fast as a 486, and consequently a 133MHz 486 class processor (such as the AMD 5x86-133) is not even as fast as a 75MHz Pentium! That is because Pentium megahertz are "worth" about double what 486 megahertz are worth in terms of instructions completed per cycle. The Pentium II and III are about 50% faster than an equivalent Pentium at a given clock speed because they can execute about that many more instructions in the same number of cycles.

Comparing relative processor performance, you can see that a 1GHz Pentium III is about equal to a (theoretical) 1.5GHz Pentium, which is about equal to a 3GHz 486, which is about equal to a 6GHz 386 or 286, which is about equal to a 12GHz 8088. The original PC's 8088 ran at only 4.77MHz; today, we have systems that are comparatively at least 2,500 times faster! As you can see, you must be careful in comparing systems based on pure MHz alone because many other factors affect system performance.

Evaluating CPU performance can be tricky. CPUs with different internal architectures do things differently and can be relatively faster at certain things and slower at others. To fairly compare various CPUs at different clock speeds, Intel has devised a specific series of benchmarks called the iCOMP (Intel Comparative Microprocessor Performance) index that can be run against processors to produce a relative gauge of performance. The iCOMP index benchmark has been updated twice and released in original iCOMP, iCOMP 2.0, and now iCOMP 3.0 versions. More information on benchmarks, including iCOMP, can be found on Intel's site at http://developer.intel.com/procs/perf/resources/spectrum.htm.

Table 3.5 shows the relative power, or iCOMP 2.0 index, for several processors.

Note

Note that this reflects the most recent iCOMP index. Intel is designing new
benchmarks that will show the power of the newer Pentium 4 and Itanium
processor when running software optimized for their internal architectures.

Table 3.5 Intel iCOMP 2.0 Index Ratings
ProcessoriCOMP 2.0 IndexProcessoriCOMP 2.0 Index
Pentium 7567Pentium Pro 200220
Pentium 10090Celeron 300226
Pentium 120100Pentium II 233267
Pentium 133111Celeron 300A296
Pentium 150114Pentium II 266303
Pentium 166127Celeron 333318
Pentium 200142Pentium II 300332
Pentium-MMX 166160Pentium II Overdrive 300351
Pentium Pro 150168Pentium II 333366
Pentium-MMX 200182Pentium II 350386
Pentium Pro 180197Pentium II Overdrive 333387
Pentium-MMX 233203Pentium II 400440
Celeron 266213Pentium II 450483

The iCOMP 2.0 index is derived from several independent benchmarks and is a stable indication of relative processor performance. The benchmarks balance integer with floating-point and multimedia performance.

Recently, Intel discontinued the iCOMP 2.0 index and released the iCOMP 3.0 index. iCOMP 3.0 is an updated benchmark that incorporates an increasing use of 3D, multimedia, and Internet technology and software, as well as the increasing use of rich data streams and compute-intensive applications, including 3D, multimedia, and Internet technology. iCOMP 3.0 combines six benchmarks: WinTune 98 Advanced CPU Integer test, CPUmark 99, 3D WinBench 99-3D Lighting and Transformation Test, MultimediaMark 99, Jmark 2.0 Processor Test, and WinBench 99-FPU WinMark. These newer benchmarks take advantage of the SSE (Streaming SIMD Extensions), additional graphics and sound instructions built into the PIII. Without taking advantage of these new instructions, the PIII would benchmark at about the same speed as a PII at the same clock rate.

Table 3.6 shows the iCOMP Index 3.0 ratings for Pentium II and III processors.

Table 3.6 Intel iCOMP 3.0 Ratings
ProcessoriCOMP 3.0 IndexProcessoriCOMP 3.0 Index
Pentium II 3501000Pentium III 6502270
Pentium II 4501240Pentium III 7002420
Pentium III 4501500Pentium III 7502540
Pentium III 5001650Pentium III 8002690
Pentium III 5501780Pentium III 8662890
Pentium III 6001930Pentium III 10003280
Pentium III 600E2110

Considerations When Interpreting iCOMP Scores

Each processor's rating is calculated at the time the processor is introduced,
using a particular, well-configured, commercially available system. Relative
iCOMP index 3.0 scores and actual system performance might be affected by
future changes in software design and configuration. Relative scores and
actual system performance also can be affected by differences in components or
characteristics of microprocessors, such as L2 cache, bus speed, extended
multimedia or graphics instructions, or improvements in the microprocessor
manufacturing process.

Differences in hardware components other than microprocessors used in the test
systems also can affect how iCOMP scores relate to actual system performance.
iCOMP 3.0 ratings cannot be compared with earlier versions of the iCOMP index
because different benchmarks and weightings are used in calculating the result.

Processor Speeds and Markings Versus Motherboard Speed

Another confusing factor when comparing processor performance is that virtually all modern processors since the 486DX2 run at some multiple of the motherboard speed. For example, a Celeron 600 runs at a multiple of nine times the motherboard speed of 66MHz, whereas a Pentium III 1GHz runs at 7 1/2 times the motherboard speed of 133MHz. Up until early 1998, most motherboards ran at 66MHz or less because that is all Intel supported with its processors until then. Starting in April 1998, Intel released both processors and motherboard chipsets designed to run at 100MHz. Cyrix has a few processors designed to run on 75MHz motherboards, and many Pentium motherboards are capable of running that speed as well, although technically Intel never supported it. AMD also has versions of the K6-2 designed to run at motherboard speeds of 100MHz.

Starting in late 1999, chipsets and motherboards running at 133MHz became available to support the newer Pentium III processors. At that time, AMD Athlon motherboards and chipsets were introduced running at 100MHz but using a double transfer technique for an effective 200MHz data rate between the Athlon processor and the main chipset North Bridge chip.

In 2000 and 2001, processor bus speeds advanced further to 266MHz for the AMD Athlon and Intel Itanium and up to 400MHz for the Pentium 4.

Some might wonder why the more powerful Itanium processor uses a slower CPU bus than the Pentium 4. Actually, I wonder that as well! My guess is because they were designed by completely different teams with completely different agendas. The Itanium was designed in conjunction with HP, and from the get-go it was intended to use double-data rate (DDR) memory, which runs at 266MHz because that was favored by the server community. Because matching the CPU bus to the memory bus allows for the best performance, a system using DDR SDRAM works best if the CPU bus is also at 266MHz.

The P4, on the other hand, was designed to use RDRAM, hence the quad-pumped bus matching RDRAM in speed. Note that these bus speeds can easily be changed in the future, just as virtually every other processor that Intel has released can be. So, for example, I fully expect the Itanium to come out in a quad-pumped version using quad-data rate (QDR) memory when that technology becomes available. The bottom line is that nobody outside of the chip maker's inner circle really knows why some of these things come out the way they do!

Note

See Chapter 4, "Motherboards and Buses," for more information on chipsets and
bus speeds.

Normally, you can set the motherboard speed and multiplier setting via jumpers or other configuration mechanism (such as BIOS setup) on the motherboard. Modern systems use a variable-frequency synthesizer circuit usually found in the main motherboard chipset to control the motherboard and CPU speed. Most Pentium motherboards have three or four speed settings. The processors used today are available in a variety of versions that run at different frequencies based on a given motherboard speed. For example, most of the Pentium chips run at a speed that is some multiple of the true motherboard speed. For example, Pentium processors and motherboards run at the speeds shown in Table 3.7.

Note

For information on specific AMD or Cyrix processors, see their respective
sections later in this chapter.

Table 3.7 Intel Processor and Motherboard Speeds
CPU TypeCPU Speed (MHz/GHz)CPU Clock MultiplierMotherboard Speed (MHz)
Pentium751.5x50
Pentium601x60
Pentium901.5x60
Pentium1202x60
Pentium1502.5x60
Pentium/Pentium Pro1803x60
Pentium661x66
Pentium1001.5x66
Pentium1332x66
Pentium/Pentium Pro1662.5x66
Pentium/Pentium Pro2003x66
Pentium/Pentium II2333.5x66
Pentium(Mobile)/Pentium II/Celeron2664x66
Pentium II/Celeron3004.5x66
Pentium II/Celeron3335x66
Pentium II/Celeron3665.5x66
Celeron4006x66
Celeron4336.5x66
Celeron4667x66
Celeron5007.5x66
Celeron5338x66
Celeron5668.5x66
Celeron6009x66
Celeron6339.5x66
Celeron66710x66
Celeron70010.5x66
Celeron73311x66
Celeron76611.5x66
Pentium II3503.5x100
Pentium II4004x100
Pentium II/III4504.5x100
Pentium III5005x100
Pentium III5505.5x100
Pentium III6006x100
Pentium III6506.5x100
Pentium III7007x100
Pentium III7507.5x100
Pentium III/Celeron8008x100
Pentium III/Celeron8508.5x100
Pentium III5334x133
Pentium III6004.5x133
Pentium III6675x133
Pentium III7335.5x133
Pentium III8006x133
Pentium III8666.5x133
Pentium III9337x133
Pentium III1.07.5x133
Pentium III1.068x133
Pentium III1.138.5x133
Pentium III1.29x133
Pentium III1.269.5x133
Pentium III1.3310x133
Pentium 41.3 3.25x400
Pentium 41.43.5x400
Pentium 41.53.75x400
Pentium 41.64x400
Pentium 41.74.25x400
Pentium 41.84.5x400
Pentium 41.94.75x400
Pentium 42.05x400
Pentium 42.15.25x400
Itanium7332.75x266
Itanium8003x266

If all other variables are equal—including the type of processor, the number of wait states (empty cycles) added to different types of memory accesses, and the width of the data bus—you can compare two systems by their respective clock rates. However, the construction and design of the memory controller (contained in the motherboard chipset) as well as the type and amount of memory installed can have an enormous effect on a system's final execution speed. In building a processor, a manufacturer tests it at various speeds, temperatures, and pressures. After the processor is tested, it receives a stamp indicating the maximum safe speed at which the unit will operate under the wide variation of temperatures and pressures encountered in normal operation. These ratings are clearly marked on the processor package.

Overclocking

In some systems, the processor speed can be set higher than the rating on the chip; this is called overclocking the chip. In many cases, you can get away with a certain amount of overclocking because Intel, AMD, and others often build safety margins into their ratings. So, a chip rated for, say, 800MHz might in fact run at 900MHz or more but is instead down-rated to allow for a greater margin of reliability. By overclocking, you are using this margin and running the chip closer to its true maximum speed. I don't normally recommend overclocking for a novice, but if you are comfortable with playing with your system, and you can afford and are capable of dealing with any potential consequences, overclocking might enable you to get more performance from your system.

If you are intent on overclocking, there are several issues to consider. One is that most Intel processors since the Pentium II have been multiplier-locked before they are shipped out. Therefore, any changes to the multiplier setting on the motherboard simply are ignored by the chip. Both Intel and AMD lock the multipliers on most of their newer processors. Although originally done to prevent re-markers from fraudulently relabeling processors, this has impacted the computing performance enthusiast, leaving tweaking the motherboard bus speed as the only way to achieve a clock speed higher than standard.

You can run into problems increasing motherboard bus speed as well. Intel motherboards, for example, simply don't support clock speeds other than the standard 66MHz, 100MHz, and 133MHz settings. Also all their boards with speed settings done via software (BIOS Setup) read the proper settings from the installed processor and only allow those settings. In other words, you simply plug in the processor, and the Intel motherboard won't allow any other settings other than what that processor is designed for.

Even if you could fool the processor into accepting a different setting, the jump from 66MHz to 100MHz, or from 100 to 133MHz, is a large one, and many processors would not make that much of a jump reliably. For example, a Pentium III 800E runs at a 100MHz bus speed with an 8x multiplier. Bumping the motherboard speed to 133MHz would cause the processor to try to run at 8x133 or 1066MHz. It is highly unlikely that the chip would run reliably at that speed. Likewise, a Celeron 600E runs at 9x66MHz. Raising the bus speed to 100MHz would cause the chip to try and run at 9x100MHz or 900MHz, likely an unsuccessful change.

What is needed is a board that supports intermediate speed settings and that allows the settings to be changed in smaller increments. This is because a given chip is generally overclockable by a certain percentage. The smaller steps you can take when increasing speed, the more likely that you'll be able to come close to the actual maximum speed of the chip without going over. For example, the Asus P3V4X motherboard supports front-side bus speed settings of 66MHz, 75MHz, 83MHz, 90MHz, 95MHz, 100MHz, 103MHz, 105MHz, 110MHz, 112MHz, 115MHz, 120MHz, 124MHz, 133MHz, 140MHz, and 150MHz. By setting the 800MHz Pentium IIIE to increments above 100MHz, you'd have:
Multiplier (fixed)Bus SpeedProcessor Speed
8x100MHz800MHz
8x103MHz824MHz
8x105MHz840MHz
8x110MHz880MHz
8x112MHz896MHz
8x115MHz920MHz
8x120MHz960MHz
8x124MHz992MHz
8x133MHz1066MHz

Likewise, using this motherboard with a Celeron 600, you could try settings above the standard 66MHz bus speed as follows:
Multiplier (fixed)Bus SpeedProcessor Speed
9x66MHz600MHz
9x75MHz675MHz
9x83MHz747MHz
9x90MHz810MHz
9x95MHz855MHz
9x100MHz900MHz

Typically, a 10%–20% increase is successful, so with this motherboard, you are likely to get your processor running 100MHz or more faster than it was originally designed for.

Another trick used by overclockers is to play with the voltage settings for the CPU. All Slot 1, Slot A, Socket 8, Socket 370, and Socket A processors have automatic voltage detection, where the system will detect and set the correct voltage by reading certain pins on the processor. Some motherboards, such as those made by Intel, do not allow any changes to these settings manually. Other motherboards, such as the Asus P3V4X I mentioned earlier, allow you to tweak the voltage settings from the automatic setting up or down by tenths of a volt. Some experimenters have found that by either increasing or decreasing voltage slightly from the standard, a higher speed of overclock can be achieved with the system running stable.

My recommendation is to be careful when playing with voltages. You can damage the chip in this manner. Even without changing voltage, overclocking with an adjustable bus speed motherboard is very easy and fairly rewarding. I do recommend you make sure you are using a high-quality board, good memory, and especially a good system chassis with additional cooling fans and a heavy-duty power supply. See Chapter 21, "Power Supply and Chassis/Case," for more information on upgrading power supplies and chassis. Especially when overclocking, it is essential that the system components and especially the CPU remain properly cooled. Going a little bit overboard on the processor heatsink and adding extra cooling fans to the case never hurts and in many cases helps a great deal when hotrodding a system in this manner.

Note

One good source of online overclocking information is located at
http://www.tomshardware.com. It includes, among other things, fairly thorough
overclocking FAQs and an ongoing survey of users who have successfully (and
sometimes unsuccessfully) overclocked their CPUs. Note that many of the newer
Intel processors incorporate fixed bus multiplier ratios, which effectively
prevent or certainly reduce the ability to overclock. Unfortunately, this can
be overridden with a simple hardware fix, and many counterfeit processor
vendors are selling re-marked (overclocked) chips.

The Processor Heatsink Might Hide the Rating

Most processors have heatsinks on top of them, which can prevent you from
reading the rating printed on the chip.
A heatsink is a metal device that draws heat away from an electronic device.
Most processors running at 50MHz and faster should have a heatsink installed
to prevent the processor from overheating.
Fortunately, most CPU manufacturers are placing marks on the top and bottom of
the processor. If the heatsink is difficult to remove from the chip, you can
take the heatsink and chip out of the socket together and read the markings on
the bottom of the processor to determine what you have.

Cyrix P-Ratings

Cyrix/IBM 6x86 processors use a PR (performance rating) scale that is not equal to the true clock speed in megahertz. For example, the Cyrix 6x86MX/MII-PR366 actually runs at only 250MHz (2.5 x 100MHz). This is a little misleading—you must set up the motherboard as if a 250MHz processor were being installed, not the 366MHz you might suspect. Unfortunately, this leads people to believe these systems are faster than they really are. Table 3.8 shows the relationship between the Cyrix 6x86, 6x86MX, and M-II P-Ratings versus the actual chip speeds in MHz.

Table 3.8 Cyrix P-Ratings Versus Actual Chip Speeds in MHz
CPU TypeP-RatingActual CPU Speed (MHz)Clock MultiplierMotherboard Speed
(MHz)
6x86PR90802x40
6x86PR1201002x50
6x86PR1331102x55
6x86PR1501202x60
6x86PR1661332x66
6x86PR2001502x75
6x86MXPR1331002x50
6x86MXPR1331102x55
6x86MXPR1501202x60
6x86MXPR1501252.5x50
6x86MXPR1661332x66
6x86MXPR166137.52.5x55
6x86MXPR1661503x50
6x86MXPR1661502.5x60
6x86MXPR2001502x75
6x86MXPR2001653x55
6x86MXPR2001662.5x66
6x86MXPR2001803x60
6x86MXPR2331662x83
6x86MXPR233187.52.5x75
6x86MXPR2332003x66
6x86MXPR266207.52.5x83
6x86MXPR2662253x75
6x86MXPR2662333.5x66
M-IIPR3002253x75
M-IIPR3002333.5x66
M-IIPR3332503x83
M-IIPR3662502.5x100
M-IIPR4002853x95
M-IIPR4333003x100
Cyrix IIIPR4333503.5x100
Cyrix IIIPR4663663x122
Cyrix IIIPR5004003x133
Cyrix IIIPR5334333.5x124
Cyrix IIIPR5334504.5x100

Note that a given P-Rating can mean several different actual CPU speeds—for example, a Cyrix 6x86MX-PR200 might actually be running at 150MHz, 165MHz, 166MHz, or 180MHz, but not at 200MHz.

This P-Rating is supposed to indicate speed in relation to an Intel Pentium processor, but the processor being compared to is the original non-MMX, small L1 cache version running on an older motherboard platform with an older chipset and slower technology memory. The P-Rating does not compare well against the Celeron, Pentium II, or Pentium III processors. In that case these chips are more comparative at their true speeds. In other words, the MII-PR366 really runs at only 250MHz and compares well against Intel processors running at closer to that speed. I consider calling a chip an MII-366 when it really runs at only 250MHz very misleading, to say the least.

AMD P-Ratings

Although both AMD and Cyrix concocted this misleading P-Rating system, AMD thankfully used it for only a short time and only on the older K5 processor. It still has the PR designation stamped on its newer chips, but all K6 and Athlon processors have PR numbers that match their actual CPU speeds in MHz. Table 3.9 shows the P-Rating and actual speeds of the AMD K5, K6, and Athlon processors.

Table 3.9 AMD P-Ratings Versus Actual Chip Speeds in MHz
CPU TypeP-RatingActual CPU Speed (MHz)Clock MultiplierMotherboard Speed
(MHz)
K5PR75751.5x50
K5PR90901.5x60
K5PR1001001.5x66
K5PR120901.5x60
K5PR1331001.5x66
K5PR166116.71.75x66
K6PR1661662.5x66
K6PR2002003x66
K6PR2332333.5x66
K6PR2662664x66
K6PR3003004.5x66
K6-2PR2332333.5x66
K6-2PR2662664x66
K6-2PR3003004.5x66
K6-2PR3003003x100
K6-2PR3333335x66
K6-2PR3333333.5x95
K6-2PR3503503.5x100
K6-2PR3663665.5x66
K6-2PR3803804x95
K6-2PR4004006x66
K6-2PR4004004x100
K6-2PR4504504.5x100
K6-2PR4754755x95
K6-2PR5005005x100
K6-2PR5335335.5x97
K6-2PR5505505.5x100
K6-3PR4004004x100
K6-3PR4504504.5x100
AthlonPR5005002.5x200
AthlonPR5505502.75x200
Athlon/DuronPR6006003x200
Athlon/DuronPR6506503.25x200
Athlon/DuronPR7007003.5x200
Athlon/DuronPR7507503.75x200
Athlon/DuronPR8008004x200
Athlon/DuronPR8508504.25x200
Athlon/DuronPR9009004.5x200
Athlon/DuronPR9509504.75x200
Athlon/DuronPR10001.05x200
AthlonPR11001.15.5x200
AthlonPR12001.26x200
AthlonPR13001.36.5x200
AthlonPR10001.03.75x266
AthlonPR11331.134.25x266
AthlonPR12001.24.5x266
AthlonPR13331.335x266

Note the Athlon to North Bridge processor bus actually runs at a double (2x) transfer speed, which is twice that of actual the motherboard clock speed.

Data Bus

Perhaps the most common way to describe a processor is by the speed at which it runs and the width of the processor's external data bus. This defines the number of data bits that can be moved into or out of the processor in one cycle. A bus is a series of connections that carry common signals. Imagine running a pair of wires from one end of a building to another. If you connect a 110v AC power generator to the two wires at any point and place outlets at convenient locations along the wires, you have constructed a power bus. No matter into which outlet you plug the wires, you have access to the same signal, which in this example is 110v AC power. Any transmission medium that has more than one outlet at each end can be called a bus. A typical computer system has several internal and external buses.

The processor bus discussed most often is the external data bus—the bundle of wires (or pins) used to send and receive data. The more signals that can be sent at the same time, the more data can be transmitted in a specified interval and, therefore, the faster (and wider) the bus. A wider data bus is like having a highway with more lanes, which enables greater throughput.

Data in a computer is sent as digital information consisting of a time interval in which a single wire carries 5v to signal a 1 data bit, or 0v to signal a 0 data bit. The more wires you have, the more individual bits you can send in the same time interval. A chip such as the 286 or 386SX, which has 16 wires for transmitting and receiving such data, has a 16-bit data bus. A 32-bit chip, such as the 386DX and 486, has twice as many wires dedicated to simultaneous data transmission as a 16-bit chip; a 32-bit chip can send twice as much information in the same time interval as a 16-bit chip. Modern processors such as the Pentium series have 64-bit external data buses. This means that all processors from the Pentium to the Athlon, Pentium 4, or Itanium can transfer 64 bits of data at a time to and from the system memory.

A good way to understand this flow of information is to consider a highway and the traffic it carries. If a highway has only one lane for each direction of travel, only one car at a time can move in a certain direction. If you want to increase traffic flow, you can add another lane so that twice as many cars pass in a specified time. You can think of an 8-bit chip as being a single-lane highway because 1 byte flows through at a time. (One byte equals 8 individual bits.) The 16-bit chip, with 2 bytes flowing at a time, resembles a two-lane highway. You might have four lanes in each direction to move a large number of automobiles; this structure corresponds to a 32-bit data bus, which has the capability to move 4 bytes of information at a time. Taking this further, a 64-bit data bus is like having an 8-lane highway moving data in and out of the chip!

Just as you can describe a highway by its lane width, you can describe a chip by the width of its data bus. When you read an advertisement that describes a 32-bit or 64-bit computer system, the ad usually refers to the CPU's data bus. This number provides a rough idea of the chip's performance potential (and, therefore, the system).

Perhaps the most important ramification of the data bus in a chip is that the width of the data bus also defines the size of a bank of memory. So, a 32-bit processor, such as the 486 class chips, reads and writes memory 32 bits at a time. Pentium-class processors, including the Pentium III and Celeron, read and write memory 64 bits at a time. Because standard 72-pin single inline memory modules (SIMMs) are only 32 bits wide, they must be installed one at a time in most 486 class systems; they're installed two at a time in most Pentium class systems. Newer dual inline memory modules (DIMMs) are 64 bits wide, so they are installed one at a time in Pentium class systems. Each DIMM is equal to a complete bank of memory in Pentium systems, which makes system configuration easy because they can then be installed or removed one at a time.

See "Memory Banks."

Internal Registers (Internal Data Bus)

The size of the internal registers indicate how much information the processor can operate on at one time and how it moves data around internally within the chip. This is sometimes also referred to as the internal data bus. The register size is essentially the same as the internal data bus size. A register is a holding cell within the processor; for example, the processor can add numbers in two different registers, storing the result in a third register. The register size determines the size of data on which the processor can operate. The register size also describes the type of software or commands and instructions a chip can run. That is, processors with 32-bit internal registers can run 32-bit instructions that are processing 32-bit chunks of data, but processors with 16-bit registers cannot. Most advanced processors today—chips from the 386 to the Pentium 4—use 32-bit internal registers and can therefore run the same 32-bit operating systems and software. The new Itanium processor has 64-bit internal registers, which require new operating systems and software to fully utilize.

Some processors have an internal data bus (made up of data paths and storage units called registers) that is larger than the external data bus. The 8088 and 386SX are examples of this structure. Each chip has an internal data bus twice the width of the external bus. These designs, which sometimes are called hybrid designs, usually are low-cost versions of a "pure" chip. The 386SX, for example, can pass data around internally with a full 32-bit register size; for communications with the outside world, however, the chip is restricted to a 16-bit-wide data path. This design enables a systems designer to build a lower-cost motherboard with a 16-bit bus design and still maintain software and instruction set compatibility with the full 32-bit 386.

Internal registers often are larger than the data bus, which means the chip requires two cycles to fill a register before the register can be operated on. For example, both the 386SX and 386DX have internal 32-bit registers, but the 386SX must "inhale" twice (figuratively) to fill them, whereas the 386DX can do the job in one "breath." The same thing would happen when the data is passed from the registers back out to the system bus.

The Pentium is an example of this type of design. All Pentiums have a 64-bit data bus and 32-bit registers—a structure that might seem to be a problem until you understand that the Pentium has two internal 32-bit pipelines for processing information. In many ways, the Pentium is like two 32-bit chips in one. The 64-bit data bus provides for very efficient filling of these multiple registers. Multiple pipelines are called superscalar architecture, which was introduced with the Pentium processor.

See "Pentium Processors."

More advanced sixth-generation processors, such as the Pentium Pro and Pentium II/III, have as many as six internal pipelines for executing instructions. Although some of these internal pipes are dedicated to special functions, these processors can still execute as many as three instructions in one clock cycle. The newest Itanium processor uses 10-stage parallel pipelines, which enable it to execute as many as 20 operations per clock cycle.

Address Bus

The address bus is the set of wires that carries the addressing information used to describe the memory location to which the data is being sent or from which the data is being retrieved. As with the data bus, each wire in an address bus carries a single bit of information. This single bit is a single digit in the address. The more wires (digits) used in calculating these addresses, the greater the total number of address locations. The size (or width) of the address bus indicates the maximum amount of RAM that a chip can address. The highway analogy can be used to show how the address bus fits in. If the data bus is the highway and the size of the data bus is equivalent to the number of lanes, the address bus relates to the house number or street address. The size of the address bus is equivalent to the number of digits in the house address number. For example, if you live on a street in which the address is limited to a two-digit (base 10) number, no more than 100 distinct addresses (00–99) can exist for that street (102). Add another digit, and the number of available addresses increases to 1,000 (000–999), or 103.

Computers use the binary (base 2) numbering system, so a two-digit number provides only four unique addresses (00, 01, 10, and 11), calculated as 22. A three-digit number provides only eight addresses (000–111), which is 23. For example, the 8086 and 8088 processors use a 20-bit address bus that calculates as a maximum of 220 or 1,048,576 bytes (1MB) of address locations. Table 3.10 describes the memory-addressing capabilities of processors.

Table 3.10 Processor Memory-Addressing Capabilities
Processor FamilyAddress BusBytesKilobytes (KB)Megabytes (MB)Gigabytes
(GB)Terabytes (TB)
8088 808620-bit1,048,5761,0241——
286 386SX24-bit16,777,21616,38416——
386DX 486 58632-bit4,294,967,2964,194,3044,0964—
686 78636-bit68,719,476,73667,108,86465,53664—
Itanium44-bit17,592,186,044,41617,179,869,18416,777,21616,38416

Note: The Pentium and AMD K6 are 586 (fifth-generation) processors. The Pentium Pro/II/III/Celeron and AMD Athlon/Duron are 686 (sixth-generation) processors, and the Pentium 4 is considered a 786 (seventh-generation) processor. The data bus and address bus are independent, and chip designers can use whatever size they want for each. Usually, however, chips with larger data buses have larger address buses. The sizes of the buses can provide important information about a chip's relative power, measured in two important ways. The size of the data bus is an indication of the chip's information-moving capability, and the size of the address bus tells you how much memory the chip can handle.

Internal Level 1 Cache

All modern processors starting with the 486 family include an integrated L1 cache and controller. The integrated L1 cache size varies from processor to processor, starting at 8KB for the original 486DX and now up to 32KB, 64KB, or more in the latest processors.

Because L1 cache is always built into the processor die, it runs at the full-core speed of the processor internally. By full-core speed, I mean this cache runs at the higher clock multiplied internal processor speed rather than the external motherboard speed. This cache basically is an area of very fast memory built into the processor and is used to hold some of the current working set of code and data. Cache memory can be accessed with no wait states because it is running at the same speed as the processor core.

Using cache memory reduces a traditional system bottleneck because system RAM often is much slower than the CPU. This prevents the processor from having to wait for code and data from much slower main memory, therefore improving performance. Without the L1 cache, a processor frequently would be forced to wait until system memory caught up.

L1 cache is even more important in modern processors because it is often the only memory in the entire system that can truly keep up with the chip. Most modern processors are clock multiplied, which means they are running at a speed that is really a multiple of the motherboard into which they are plugged. The Pentium III 1GHz, for example, runs at a multiple of 7 1/2 times the true motherboard speed of 133MHz. Because the main memory is plugged into the motherboard, it can also run at only 133MHz maximum. The only 1GHz memory in such a system is the L1 and L2 caches built into the processor core. In this example, the Pentium III 1GHz processor has 32KB of integrated L1 cache in two separate 16KB blocks and 256KB of L2, all running at the full speed of the processor core.

See "Memory Module Speed."

If the data the processor wants is already in the internal cache, the CPU does not have to wait. If the data is not in the cache, the CPU must fetch it from the Level 2 cache or (in less sophisticated system designs) from the system bus, meaning main memory directly.

To understand the importance of cache, you need to know the relative speeds of processors and memory. The problem with this is that processor speed usually is expressed in MHz (millions of cycles per second), whereas memory speeds often are expressed in nanoseconds (billionths of a second per cycle).

Both are really time- or frequency-based measurements, and a chart comparing them can be found in Chapter 6, "Memory," Table 6.3. In this table, you will note that a 233MHz processor equates to 4.3 nanosecond cycling, which means you would need 4ns memory to keep pace with a 200MHz CPU. Also note that the motherboard of a 233MHz system typically runs at 66MHz, which corresponds to a speed of 15ns per cycle, and requires 15ns memory to keep pace. Finally note that 60ns main memory (common on many Pentium class systems) equates to a clock speed of approximately 16MHz. So in a typical Pentium 233 system, you have a processor running at 233MHz (4.3ns per cycle), a motherboard running at 66MHz (15ns per cycle), and main memory running at 16MHz (60ns per cycle).

How Cache Works

To learn how the L1 and L2 caches work, consider the following analogy. This story involves a person (in this case you) eating food to act as the processor requesting and operating on data from memory. The kitchen where the food is prepared is the main memory (SIMM/DIMM) RAM. The cache controller is the waiter, and the L1 cache is the table at which you are seated. L2 cache is introduced as a food cart, which is positioned between your table and the kitchen.

Okay, here's the story. Say you start to eat at a particular restaurant every day at the same time. You come in, sit down, and order a hot dog. To keep this story proportionately accurate, let's say you normally eat at the rate of one bite (byte? ) every four seconds (233MHz = about 4ns cycling). It also takes 60 seconds for the kitchen to produce any given item that you order (60ns main memory).

So, when you first arrive, you sit down, order a hot dog, and you have to wait for 60 seconds for the food to be produced before you can begin eating. After the waiter brings the food, you start eating at your normal rate. Pretty quickly you finish the hot dog, so you call the waiter and order a hamburger. Again you wait 60 seconds while the hamburger is being produced. When it arrives, you again begin eating at full speed. After you finish the hamburger, you order a plate of fries. Again you wait, and after it is delivered 60 seconds later, you eat it at full speed. Finally, you decide to finish the meal and order cheesecake for dessert. After another 60-second wait, you can again eat dessert at full speed. Your overall eating experience consists of mostly a lot of waiting, followed by short bursts of actual eating at full speed.

After coming into the restaurant for two consecutive nights at exactly 6 p.m. and ordering the same items in the same order each time, on the third night the waiter begins to think; "I know this guy is going to be here at 6 p.m., order a hot dog, a hamburger, fries, and then cheesecake. Why don't I have these items prepared in advance and surprise him, maybe I'll get a big tip?" So you enter the restaurant and order a hot dog, and the waiter immediately puts it on your plate, with no waiting! You then proceed to finish the hot dog and right as you are about to request the hamburger, the waiter deposits one on your plate. The rest of the meal continues in the same fashion, and you eat the entire meal, taking a bite every four seconds, and never have to wait for the kitchen to prepare the food. Your overall eating experience this time consists of all eating, with no waiting for the food to be prepared, due primarily to the intelligence and thoughtfulness of your waiter.

This analogy exactly describes the function of the L1 cache in the processor. The L1 cache itself is the table that can contain one or more plates of food. Without a waiter, the space on the table is a simple food buffer. When stocked, you can eat until the buffer is empty, but nobody seems to be intelligently refilling it. The waiter is the cache controller who takes action and adds the intelligence to decide which dishes are to be placed on the table in advance of your needing them. Like the real cache controller, he uses his skills to literally guess which food you will require next, and if and when he guesses right, you never have to wait.

Let's now say on the fourth night you arrive exactly on time and start off with the usual hot dog. The waiter, by now really feeling confident, has the hot dog already prepared when you arrive, so there is no waiting.

Just as you finish the hot dog, and right as he is placing a hamburger on your plate, you say "Gee, I'd really like a bratwurst now; I didn't actually order this hamburger." The waiter guessed wrong, and the consequence is that this time you have to wait the full 60 seconds as the kitchen prepares your brat. This is known as a cache miss, in which the cache controller did not correctly fill the cache with the data the processor actually needed next. The result is waiting, or in the case of a sample 233MHz Pentium system, the system essentially throttles back to 16MHz (RAM speed) whenever a cache miss occurs. According to Intel, the L1 cache in most of its processors has approximately a 90% hit ratio. This means that the cache has the correct data 90% of the time, and consequently the processor runs at full speed—233MHz in this example—90% of the time. However, 10% of the time the cache controller guesses wrong and the data has to be retrieved out of the significantly slower main memory, meaning the processor has to wait. This essentially throttles the system back to RAM speed, which in this example was 60ns or 16MHz.

In this analogy, the processor was 14 times faster than the main memory. Memory speeds have increased from 16MHz (60ns) to 266MHz (3.8ns), but processor speeds have also risen to 2GHz and beyond, so even in the latest systems, memory is still 7.5 or more times SLOWER than the processor. Cache is what makes up the difference.

The main feature of L1 cache is that it has always been integrated into the processor core, where it runs at the same speed as the core. This, combined with the hit ratio of 90% or greater, makes L1 cache very important for system performance.

Level 2 Cache

To mitigate the dramatic slowdown every time an L1 cache miss occurs, a secondary (L2) cache can be employed.

Using the restaurant analogy I used to explain L1 cache in the previous section, I'll equate the L2 cache to a cart of additional food items placed strategically such that the waiter can retrieve food from it in 15 seconds. In an actual Pentium class (Socket 7) system, the L2 cache is mounted on the motherboard, which means it runs at motherboard speed—66MHz, or 15ns in this example. Now, if you ask for an item the waiter did not bring in advance to your table, instead of making the long trek back to the kitchen to retrieve the food and bring it back to you 60 seconds later, he can first check the cart where he has placed additional items. If the requested item is there, he will return with it in only 15 seconds. The net effect in the real system is that instead of slowing down from 233MHz to 16MHz waiting for the data to come from the 60ns main memory, the data can instead be retrieved from the 15ns (66MHz) L2 cache. The effect is that the system slows down from 233MHz to 66MHz.

Just as with the L1 cache, most L2 caches have a hit ratio also in the 90% range; therefore, if you look at the system as a whole, 90% of the time it will be running at full speed (233MHz in this example) by retrieving data out of the L1 cache. Ten percent of the time it will slow down to retrieve the data from the L2 cache. Ninety percent of the time the processor goes to the L2 cache, the data will be in the L2, and 10% of that time it will have to go to the slow main memory to get the data because of an L2 cache miss. So, by combining both caches, our sample system runs at full processor speed 90% of the time (233MHz in this case), at motherboard speed 9% (90% of 10%) of the time (66MHz in this case), and at RAM speed about 1% (10% of 10%) of the time (16MHz in this case). You can clearly see the importance of both the L1 and L2 caches; without them the system uses main memory more often, which is significantly slower than the processor.

This brings up other interesting points. If you could spend money doubling the performance of either the main memory (RAM) or the L2 cache, which would you improve? Considering that main memory is used directly only about 1% of the time, if you doubled performance there, you would double the speed of your system only 1% of the time! That doesn't sound like enough of an improvement to justify much expense. On the other hand, if you doubled L2 cache performance, you would be doubling system performance 9% of the time, a much greater improvement overall. I'd much rather improve L2 than RAM performance.

The processor and system designers at Intel and AMD know this and have devised methods of improving the performance of L2 cache. In Pentium (P5) class systems, the L2 cache usually was found on the motherboard and had to therefore run at motherboard speed. Intel made the first dramatic improvement by migrating the L2 cache from the motherboard directly into the processor and initially running it at the same speed as the main processor. The cache chips were made by Intel and mounted next to the main processor die in a single chip housing. This proved too expensive, so with the Pentium II Intel began using cache chips from third-party suppliers such as Sony, Toshiba, NEC, Samsung, and others. Because these were supplied as complete packaged chips and not raw die, Intel mounted them on a circuit board alongside the processor. This is why the Pentium II was designed as a cartridge rather than what looked like a chip.

One problem was the speed of the available third-party cache chips. The fastest ones on the market were 3ns or higher, meaning 333MHz or less in speed. Because the processor was being driven in speed above that, in the Pentium II and initial Pentium III processors Intel had to run the L2 cache at half the processor speed because that is all the commercially available cache memory could handle. AMD followed suit with the Athlon processor, which had to drop L2 cache speed even further in some models to two-fifths or one-third the main CPU speed to keep the cache memory speed less than the 333MHz commercially available chips.

Then a breakthrough occurred, which first appeared in the Celeron processor 300A and above. These had 128KB of L2 cache, but no external chips were used. Instead, the L2 cache had been integrated directly into the processor core just like the L1. Consequently, both the L1 and L2 caches now would run at full processor speed, and more importantly scale up in speed as the processor speeds increased in the future. In the newer Pentium III, as well as all the Xeon and Celeron processors, the L2 cache runs at full processor core speed, which means there is no waiting or slowing down after an L1 cache miss. AMD also achieved full-core speed on-die cache in its later Athlon and Duron chips. Using on-die cache improves performance dramatically because the 9% of the time the system would be using the L2 it would now remain at full speed instead of slowing down to one-half or less the processor speed or, even worse, slow down to motherboard speed as in Socket 7 designs. Another benefit of on-die L2 cache is cost, which is less because now fewer parts are involved.

Let's revisit the restaurant analogy using a modern Pentium III 1GHz. You would now be taking a bite every one second (1GHz = 1ns cycling). The L1 cache would also be running at that speed, so you could eat anything on your table at that same rate (the table = L1 cache). The real jump in speed comes when you want something that isn't already on the table (L1 cache miss), in which case the waiter runs to the cart and returns nine out of ten times with the food you want in only one second (L2 speed = 1GHz or 1ns cycling). In this more modern system, you would run at 1GHz 99% of the time (L1 and L2 hit ratios combined) and slow down to RAM speed (wait for the kitchen) only 1% of the time as before. With faster memory running at 133MHz (7.5ns), you would have to wait only 7.5 seconds for the food to come from the kitchen. If only restaurant performance increased at the same rate processor performance has!

Cache Organization

The organization of the cache memory in the 486 and Pentium family is called a four-way set associative cache, which means that the cache memory is split into four blocks. Each block also is organized as 128 or 256 lines of 16 bytes each. To understand how a four-way set associative cache works, consider a simple example. In the simplest cache design, the cache is set up as a single block into which you can load the contents of a corresponding block of main memory. This procedure is similar to using a bookmark to locate the current page of a book you are reading. If main memory equates to all the pages in the book, the bookmark indicates which pages are held in cache memory. This procedure works if the required data is located within the pages marked with the bookmark, but it does not work if you need to refer to a previously read page. In that case, the bookmark is of no use.

An alternative approach is to maintain multiple bookmarks to mark several parts of the book simultaneously. Additional hardware overhead is associated with having multiple bookmarks, and you also have to take time to check all the bookmarks to see which one marks the pages of data you need. Each additional bookmark adds to the overhead but also increases your chance of finding the desired pages.

If you settle on marking four areas in the book, you have essentially constructed a four-way set associative cache. This technique splits the available cache memory into four blocks, each of which stores different lines of main memory. Multitasking environments, such as Windows, are good examples of environments in which the processor needs to operate on different areas of memory simultaneously and in which a four-way cache improves performance greatly.

The contents of the cache must always be in sync with the contents of main memory to ensure that the processor is working with current data. For this reason, the internal cache in the 486 family is a write-through cache.

Write-through means that when the processor writes information out to the cache, that information is automatically written through to main memory as well. By comparison, the Pentium and later chips have an internal write-back cache, which means that both reads and writes are cached, further improving performance. Even though the internal 486 cache is write-through, the system can employ an external write-back cache for increased performance. In addition, the 486 can buffer up to 4 bytes before actually storing the data in RAM, improving efficiency in case the memory bus is busy.

Another feature of improved cache designs is that they are nonblocking. This is a technique for reducing or hiding memory delays by exploiting the overlap of processor operations with data accesses. A nonblocking cache enables program execution to proceed concurrently with cache misses as long as certain dependency constraints are observed. In other words, the cache can handle a cache miss much better and enable the processor to continue doing something nondependent on the missing data.

The cache controller built into the processor also is responsible for watching the memory bus when alternative processors, known as bus masters, are in control of the system. This process of watching the bus is referred to as bus snooping. If a bus master device writes to an area of memory that also is stored in the processor cache currently, the cache contents and memory no longer agree. The cache controller then marks this data as invalid and reloads the cache during the next memory access, preserving the integrity of the system.

A secondary external L2 cache of extremely fast static RAM (SRAM) chips also is used in most systems. It further reduces the amount of time the CPU must spend waiting for data from system memory. The function of the secondary processor cache is similar to that of the onboard cache. The secondary processor cache holds information that is moving to the CPU, thereby reducing the time the CPU spends waiting and increasing the time the CPU spends performing calculations. Fetching information from the secondary processor cache rather than from system memory is much faster because of the SRAM chips' extremely fast speed—15 nanoseconds (ns) or less.

Pentium systems incorporate the secondary cache on the motherboard, whereas Pentium Pro and later systems have the secondary cache inside the processor package. By moving the L2 cache into the processor, systems are capable of running at speeds higher than the motherboard—up to as fast as the processor core.

As clock speeds increase, cycle time decreases. Most SIMM memory used in Pentium and earlier systems was 60ns, which works out to be only about 16MHz! Standard motherboard speeds are now 66MHz, 100MHz, or 133MHz, and processors are available at 600MHz or more. Newer systems don't use cache on the motherboard any longer because the faster SDRAM or RDRAM used in modern Pentium Celeron/II/III systems can keep up with the motherboard speed. The trend today is toward integrating the L2 cache into the processor die just like the L1 cache. This enables the L2 to run at full-core speed because it is now a part of the core. Cache speed is always more important than size. The rule is that a smaller but faster cache is always better than a slower but bigger cache. Table 3.11 illustrates the need for and function of L1 (internal) and L2 (external) caches in modern systems.

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Microprocessors

The brain or engine of the PC is the processor (sometimes called microprocessor), or central processing unit (CPU). The CPU performs the system's calculating and processing. The processor is often the most expensive single component in the system; in higher-end systems it can cost up to four or more times more than the motherboard it plugs into. Intel is generally credited with creating the first microprocessor in 1971 with the introduction of a chip called the 4004. Today Intel still has control over the processor market, at least for PC systems. This means that all PC-compatible systems use either Intel processors or Intel-compatible processors from a handful of competitors (such as AMD or VIA/Cyrix).

Intel's dominance in the processor market hadn't always been assured. Although Intel is generally credited with inventing the processor and introducing the first one on the market, by the late 1970s the two most popular processors for PCs were not from Intel (although one was a clone of an Intel processor). Personal computers of that time primarily used the Z-80 by Zilog and the 6502 by MOS Technologies. The Z-80 was noted for being an improved and less expensive clone of the Intel 8080 processor, similar to the way companies today such as AMD, Cyrix, IDT, and Rise Technologies have cloned Intel's Pentium processors. In that case, though, the clone had become more popular than the original. Some might argue that AMD has achieved that type of status over the past year, but even though they have made significant gains, Intel still runs the PC processor show.

Back then I had a system containing both of those processors, consisting of a 1MHz (yes, that's 1, as in 1MHz!) 6502-based Apple main system with a Microsoft Softcard (Z-80 card) plugged into one of the slots. The Softcard contained a 2MHz Z-80 processor. This enabled me to run software for both types of processors on the one system. The Z-80 was used in systems of the late 1970s and early 1980s that ran the CP/M operating system, whereas the 6502 was best known for its use in the early Apple computers (before the Mac).

The fate of both Intel and Microsoft was dramatically changed in 1981 when IBM introduced the IBM PC, which was based on a 4.77MHz Intel 8088 processor running the Microsoft Disk Operating System (MS-DOS) 1.0. Since that fateful decision was made, PC-compatible systems have used a string of Intel or Intel-compatible processors, with each new one capable of running the software of the processor before it—from the 8088 to the current Pentium 4/III/Celeron and Athlon/Duron. The following sections cover the various types of processor chips that have been used in personal computers since the first PC was introduced almost two decades ago. These sections provide a great deal of technical detail about these chips and explain why one type of CPU chip can do more work than another in a given period of time.

Pre-PC Microprocessor History

It is interesting to note that the microprocessor had existed for only 10 years prior to the creation of the PC! The microprocessor was invented by Intel in 1971; the PC was created by IBM in 1981. Now nearly 20 years later, we are still using systems based more or less on the design of that first PC. The processors powering our PCs today are still backward compatible in many ways with the 8088 selected by IBM in 1981.

The story of the development of the first microprocessor, the Intel 4004, can be read in Chapter 1, "Personal Computer Background." The 4004 processor was introduced on November 15, 1971, and originally ran at a clock speed of 108KHz (108,000 cycles per second, or just over one-tenth a megahertz). The 4004 contained 2,300 transistors and was built on a 10-micron process. This means that each line, trace, or transistor could be spaced about 10 microns (millionths of a meter) apart. Data was transferred 4 bits at a time, and the maximum addressable memory was only 640 bytes. The 4004 was designed for use in a calculator but proved to be useful for many other functions because of its inherent programmability.

In April 1972, Intel released the 8008 processor, which originally ran at a clock speed of 200KHz (0.2MHz). The 8008 processor contained 3,500 transistors and was built on the same 10-micron process as the previous processor. The big change in the 8008 was that it had an 8-bit data bus, which meant it could move data 8 bits at a time—twice as much as the previous chip. It could also address more memory, up to 16KB. This chip was primarily used in dumb terminals and general-purpose calculators.

The next chip in the lineup was the 8080, introduced in April 1974, running at a clock rate of 2MHz. Due mostly to the faster clock rate, the 8080 processor had 10 times the performance of the 8008. The 8080 chip contained 6,000 transistors and was built on a 6-micron process. Similar to the previous chip, the 8080 had an 8-bit data bus, so it could transfer 8 bits of data at a time. The 8080 could address up to 64KB of memory, significantly more than the previous chip. It was the 8080 that helped start the PC revolution because this was the processor chip used in what is generally regarded as the first personal computer, the Altair 8800. The CP/M operating system was written for the 8080 chip, and Microsoft was founded and delivered its first product: Microsoft BASIC for the Altair. These initial tools provided the foundation for a revolution in software because thousands of programs were written to run on this platform. In fact, the 8080 became so popular that it was cloned. A company called Zilog formed in late 1975, joined by several ex-Intel 8080 engineers. In July of 1976, it released the Z-80 processor, which was a vastly improved version of the 8080. It was not pin compatible but instead combined functions such as the memory interface and RAM refresh circuitry, which enabled cheaper and simpler systems to be designed. The Z-80 also incorporated a superset of 8080 instructions, meaning it could run all 8080 programs. It also included new instructions and new internal registers, so software designed for the Z-80 would not necessarily run on the older 8080. The Z-80 ran initially at 2.5MHz (later versions ran up to 10MHz) and contained 8,500 transistors. The Z-80 could access 64KB of memory. Radio Shack selected the Z-80 for the TRS-80 Model 1, its first PC. The chip also was the first to be used by many pioneering systems, including the Osborne and Kaypro machines. Other companies followed, and soon the Z-80 was the standard processor for systems running the CP/M operating system and the popular software of the day.

Intel released the 8085, its followup to the 8080, in March of 1976. Even though it predated the Z-80 by several months, it never achieved the popularity of the Z-80 in personal computer systems. It was popular as an embedded controller, finding use in scales and other computerized equipment. The 8085 ran at 5MHz and contained 6,500 transistors. It was built on a 3-micron process and incorporated an 8-bit data bus.

Along different architectural lines, MOS Technologies introduced the 6502 in 1976. This chip was designed by several ex-Motorola engineers who had worked on Motorola's first processor, the 6800. The 6502 was an 8-bit processor like the 8080, but it sold for around $25, whereas the 8080 cost about $300 when it was introduced. The price appealed to Steve Wozniak, who placed the chip in his Apple I and Apple II designs. The chip was also used in systems by Commodore and other system manufacturers. The 6502 and its successors were also used in computer games, including the original Nintendo Entertainment System (NES) among others. Motorola went on to create the 68000 series, which became the basis for the Apple Macintosh line of computers. Today those systems use the PowerPC chip, also by Motorola and a successor to the 68000 series.

All these previous chips set the stage for the first PC chips. Intel introduced the 8086 in June 1978. The 8086 chip brought with it the original x86 instruction set that is still present on x86-compatible chips such as the Pentium 4. A dramatic improvement over the previous chips, the 8086 was a full 16-bit design with 16-bit internal registers and a 16-bit data bus. This meant that it could work on 16-bit numbers and data internally and also transfer 16 bits at a time in and out of the chip. The 8086 contained 29,000 transistors and initially ran at up to 5MHz. The chip also used 20-bit addressing, so it could directly address up to 1MB of memory. Although not directly backward compatible with the 8080, the 8086 instructions and language were very similar and enabled older programs to quickly be ported over to run. This later proved important to help jumpstart the PC software revolution with recycled CP/M (8080) software. Although the 8086 was a great chip, it was expensive at the time and more importantly required an expensive 16-bit support chip and board design. To help bring costs down, in 1979, Intel released a crippled version of the 8086 called the 8088. The 8088 processor used the same internal core as the 8086, had the same 16-bit registers, and could address the same 1MB of memory, but the external data bus was reduced to 8 bits. This enabled support chips from the older 8-bit 8085 to be used, and far less expensive boards and systems could be made. It is for these reasons that IBM chose the crippled chip, the 8088, for the first PC.

This decision would affect history in several ways. The 8088 was fully software compatible with the 8086, so it could run 16-bit software. Also, because the instruction set was very similar to the previous 8085 and 8080, programs written for those older chips could be quickly and easily modified to run. This enabled a large library of programs to be quickly released for the IBM PC, thus helping it become a success. The overwhelming blockbuster success of the IBM PC left in its wake the legacy of requiring backward compatibility with it. To maintain the momentum, Intel has pretty much been forced to maintain backward compatibility with the 8088/8086 in most of the processors it has released since then. In some ways the success of the PC, and the Intel architecture it contains, has limited the growth of the personal computer. In other ways, however, its success has caused a huge number of programs, peripherals, and accessories to be developed and the PC to become a de facto standard in the industry. The original 8088 processor used in the first PC contained close to 30,000 transistors and ran at less than 5MHz. Intel introduced one version of the Pentium III Xeon with 2MB of on-die cache that has a whopping 140 million transistors—the largest ever in a single processor chip. Intel has also released processors running at speeds of 2GHz and beyond, and AMD is not very far behind. And the progress doesn't stop there because, according to Moore's Law, processing speed and transistor counts are doubling every 1.5–2 years.

Processor Specifications

Many confusing specifications often are quoted in discussions of processors. The following sections discuss some of these specifications, including the data bus, address bus, and speed. The next section includes a table that lists the specifications of virtually all PC processors.

Processors can be identified by two main parameters: how wide they are and how fast they are. The speed of a processor is a fairly simple concept. Speed is counted in megahertz (MHz) and gigahertz (GHz), which means millions and billions, respectively, of cycles per second—and faster is better! The width of a processor is a little more complicated to discuss because three main specifications in a processor are expressed in width. They are

Internal registers

Data input and output bus

Memory address bus

Systems below 16MHz usually had no cache memory at all. Starting with 16MHz systems, high-speed cache memory appeared on the motherboard because the main memory at the time could not run at 16MHz. Prior to the 486 processor, the cache on the motherboard was the only cache used in the system.

Starting with the 486 series, processors began including what was called Level 1 (L1) cache directly on the processor die. Therefore, the L1 cache always ran at the full speed of the chip, especially important when the later 486 chips began to run at speeds higher than the motherboards they were plugged into. During this time the cache on the motherboard was called the second level, or L2, cache and ran at the slower motherboard speed.

Starting with the Pentium Pro and Pentium II, Intel began including L2 cache memory chips directly within the same package as the main processor. Originally, this built-in L2 cache was implemented as physically separate chips contained within the processor package but not a part of the processor die. Because the speed of commercially available cache memory chips could not keep pace with the main processor, most of the L2 cache in these processors ran at one-half speed (Pentium II/III and AMD Athlon), whereas some ran the cache even slower—at two-fifths or even one-third the processor speed (AMD Athlon).

The original Pentium II, III, Celeron, and Athlon (Model 1 and 2) processors use 512KB of either one-half, two-fifths, or one-third speed L2 cache, as Table 3.1 shows.

Table 3.1 L2 Cache Speeds
ProcessorSpeedL2 SizeL2 TypeL2 Speed
Pentium III450–600MHz512KBExternal1/2 core (225–300MHz)
Athlon550–700MHz512KBExternal1/2 core (275–350MHz)
Athlon750–850MHz512KBExternal2/5 core (300–340MHz)
Athlon900–1000MHz512KBExternal1/3 core (300–333MHz)

The Pentium Pro, Pentium II/III Xeon, newer Pentium III, Celeron, K6-3, Athlon (Model 4, codenamed Thunderbird), and Duron processors include full-core speed L2, as shown in Table 3.2.

Table 3.2 Full-Core Speed Cache
ProcessorSpeedL2 SizeL2 TypeL2 Speed
Pentium Pro150–200MHz256KB–1MBExternalFull core
K6-3350–450MHz256KBOn-dieFull core
Duron550–700+MHz64KBOn-dieFull core
Celeron300–600+MHz128KBOn-dieFull core
Pentium II Xeon400–450MHz512KB–2MBExternalFull core
Athlon650–1000+MHz256KBOn-dieFull core
Pentium III500–1000+MHz256KBOn-dieFull core
Pentium III Xeon500–1000+MHz256KB–2MBOn-dieFull core
Pentium 41.3–2.0+GHz256KBOn-dieFull core
Xeon1.4–2.0+GHz256KB–1MBOn-dieFull core

The problem originally forcing the L2 cache to run at less than the processor core speed was simple: The cache chips available on the market simply couldn't keep up. Intel built its own high-speed cache memory chips for the earlier Xeon processors, but it also made them very expensive. A breakthrough occurred in the second-generation Celeron, in which Intel built both the L1 and L2 caches directly on the processor die, where they both ran at the full-core speed of the chip. This type of design was then quickly adopted by the second-generation Pentium III, as well as the AMD K6-3, Athlon, and Duron processors. In fact, virtually all future processors from Intel and AMD have adopted or will adopt on-die L2 cache because it is the only cost-effective way to include the L2 and increase the speed.

Table 3.3 lists the primary specifications for the Intel family of processors used in IBM and compatible PCs. Table 3.4 lists the Intel-compatible processors from AMD, Cyrix, NexGen, IDT, and Rise.

Table 3.3 Intel Processor Specifications
ProcessorCPU ClockVoltageInternal Register SizeData Bus WidthMax.
MemoryLevel 1 CacheL1 Cache TypeLevel 2 CacheL2 Cache SpeedIntegral
FPUMultimedia InstructionsNo. of TransistorsDate Introduced
80881x5v16-bit8-bit1MB——————29,000June '79
80861x5v16-bit16-bit1MB——————29,000June '78
2861x5v16-bit16-bit16MB——————134,000Feb. '82
386SX1x5v32-bit16-bit16MB———Bus——275,000June '88
386SL1x3.3v32-bit16-bit16MB0KB1WT—Bus——855,000Oct. '90
386DX1x5v32-bit32-bit4GB———Bus——275,000Oct. '85
486SX1x5v32-bit32-bit4GB8KBWT—Bus——1.185MApril '91
486SX22x5v32-bit32-bit4GB8KBWT—Bus——1.185MApril '94
487SX1x5v32-bit32-bit4GB8KBWT—BusYes—1.2MApril '91
486DX1x5v32-bit32-bit4GB8KBWT—BusYes—1.2MApril '89
486SL21x3.3v32-bit32-bit4GB8KBWT—BusOpt.—1.4MNov. '92
486DX22x5v32-bit32-bit4GB8KBWT—BusYes—1.2MMarch '92
486DX42-3x3.3v32-bit32-bit4GB16KBWT—BusYes—1.6MFeb. '94
486Pentium OD2.5x5v32-bit32-bit4GB2x16KBWB—BusYes—3.1MJan. '95
Pentium 60/661x5v32-bit64-bit4GB2x8KBWB—BusYes—3.1MMarch '93
Pentium 75-2001.5–3x3.3–3.5v32-bit64-bit4GB2x8KBWB—BusYes—3.3MOct. '94
Pentium MMX1.5–4.5x1.8–2.8v32-bit64-bit4GB2x16KBWB—BusYesMMX4.5MJan. '97
Pentium Pro2–3x3.3v32-bit64-bit64GB2x8KBWB256KB 512KB 1MBCoreYes—5.5MNov.
'95
Pentium II3.5–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB_ CoreYesMMX7.5MMay
'97
Pentium II PE3.5–6x1.6v32-bit64-bit64GB2x16KBWB256KBCore3YesMMX27.4MJan.
'99
Celeron3.5–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB0KB—YesMMX7.5MApril '98
Celeron A3.5–8x1.5–2v32-bit64-bit64GB2x16KBWB128KBCore3YesMMX19MAug. '98
Celeron
III4.5–9x1.3–1.6v32-bit64-bit64GB2x16KBWB128KBCore3YesSSE28.1M4Feb. '00
Pentium III4–6x1.8–2v32-bit64-bit64GB2x16KBWB512KB_ CoreYesSSE9.5MFeb. '99
Pentium IIIE4–9x1.3–1.7v32-bit64-bit64GB2x16KBWB256KBCore3YesSSE28.1MOct.
'99
Pentium II Xeon4–4.5x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB 1MB
2MBCoreYesMMX7.5MApril '98
Pentium III Xeon5–6x1.8–2.8v32-bit64-bit64GB2x16KBWB512KB 1MB
2MBCoreYesSSE9.5MMarch '99
Pentium IIIE Xeon4.5–6.5x1.65v32-bit64-bit64GB2x16KBWB256KB 1MB
2MBCore3YesSSE28.1M
84M
140MOct. '99 May '00
Pentium 43–5x1.7v32-bit64-bit64GB12+8KBWB256KBCore3YesSSE242MNov. '00
Pentium 4 Xeon3–5x1.7v32-bit64-bit64GB12+8KBWB256KBCore3YesSSE242MMay '01
Itanium3–5x1.6v64-bit64-bit16TB2x16KBWB96KB5Core3YesMMX25MMay '01

Table 3.4 AMD, Cyrix, NexGen, IDT, and Rise Processors
ProcessorCPU ClockVoltageInternal Register SizeData Bus WidthMax.
MemoryLevel 1 CacheL1 Cache TypeLevel 2 CacheL2 Cache SpeedIntegral
FPUMultimedia InstructionsNo. of TransistorsDate Introduced
AMD K51.5–1.75x3.5v32-bit64-bit4GB16+8KBWB—BusYes—4.3MMarch '96
AMD K62.5–4.5x2.2–3.2v32-bit64-bit4GB2x32KBWB—BusYesMMX8.8MApril '97
AMD K6-22.5–6x1.9–2.4v32-bit64-bit4GB2x32KBWB—BusYes3DNow9.3MMay '98
AMD K6-33.5–4.5x1.8–2.4v32-bit64-bit4GB2x32KBWB256KBCore3Yes3DNow21.3MFeb.
'99
AMD Athlon5–10x1.6–1.8v32-bit64-bit8TB2x64KBWB512KB1/2–1/3 coreYesEnh.
3DNow22MJun. '99
AMD Duron5–10x1.5–1.8v32-bit64-bit8TB2x64KBWB64KBCore3YesEnh. 3DNow25MJune
'00
AMD Athlon 45–10x1.5–1.8v32-bit64-bit8TB2x64KBWB256KBCore3YesEnh.
3DNow37MJune '00
Cyrix 6x862x2.5–3.5v32-bit64-bit4GB16KBWB—BusYes—3MFeb. '96
Cyrix 6x86MX/MII2–3.5x2.2–2.9v32-bit64-bit4GB64KBWB—BusYesMMX6.5MMay '97
Cyrix III2.5–7x2.2v32-bit64-bit4GB64KBWB256KBCore3Yes3Dnow22MFeb. '00
NexGen Nx5862x4v32-bit64-bit4GB2x16KBWB—BusYes—3.5MMarch '94
IDT Winchip3–4x3.3–3.5v32-bit64-bit4GB2x32KBWB—BusYesMMX5.4MOct. '97
IDT Winchip2/2A2.33–4x3.3–3.5v32-bit64-bit4GB2x32KBWB—BusYes3Dnow5.9MSept.
'98
Rise mP62–3.5x2.8v32-bit64-bit4GB2x8KBWB—BusYesMMX3.6MOct. '98

FPU = Floating-Point unit (internal math coprocessor)

WT = Write-Through cache (caches reads only)

WB = Write-Back cache (caches both reads and writes)

M = Millions

Bus = Processor external bus speed (motherboard speed)

Core = Processor internal core speed (CPU speed)

MMX = Multimedia extensions, 57 additional instructions for graphics and sound processing

3DNow = MMX plus 21 additional instructions for graphics and sound processing Enh. 3DNow = 3DNow plus 24 additional instructions for graphics and sound processing

SSE = Streaming SIMD (single instruction multiple data) Extensions, MMX plus 70 additional instructions for graphics and sound processing

SSE2 = Streaming SIMD Extensions 2, SSE plus 144 additional instructions for graphics and sound processing

1. The 386SL contains an integral-cache controller, but the cache memory must be provided outside the chip.

2. Intel later marketed SL Enhanced versions of the SX, DX, and DX2 processors. These processors were available in both 5v and 3.3v versions and included power-management capabilities.

3. On-die integrated L2 cache—runs at full-core speed.

4. 128KB functional L2 cache (256KB total, 128KB disabled); uses same die as Pentium IIIE.

5. The Itanium also includes an additional 2MB (150M transistors) or 4MB (300M transistors) of integrated on-cartridge L3 cache running at full core speed.

Note
Note in Table 3.3 that the Pentium Pro processor includes 256KB, 512KB, or 1MB
of full-core speed L2 cache in a separate die within the chip. The Pentium
II/III processors include 512KB of half-core speed L2 cache on the processor
card. The Celeron, Pentium II PE, and Pentium IIIE processors include
full-core speed L2 cache integrated directly within the processor die. The
Celeron III uses the same die as the Pentium IIIE, but half of the on-die
cache is disabled, leaving 128KB functional.

The transistor count figures do not include the external (off-die) 256KB,
512KB, 1MB, or 2MB L2 cache built into the Pentium Pro, Pentium II/III, Xeon,
and AMD Athlon CPU packages, or the 2MB or 4MB of L3 cache in the Itanium. The
external L2 cache in those processors contains an additional 15.5 (256KB), 31
(512KB), 62 million (1MB), or 124 million (2MB) transistors in separate chips,
whereas the external 2MB or 4MB of L3 cache in the Itanium includes up to 300
million transistors!

Note in Table 3.4 that the Athlon includes either 512KB of L2 cache via
separate chips, running at either one-half, two-fifths, or one-third the core
speed, or 256KB of on-die L2 running at full-core speed, depending on which
version you have.

Processor Speed Ratings

A common misunderstanding about processors is their different speed ratings. This section covers processor speed in general and then provides more specific information about Intel processors.

A computer system's clock speed is measured as a frequency, usually expressed as a number of cycles per second. A crystal oscillator controls clock speeds using a sliver of quartz sometimes contained in what looks like a small tin container. Newer systems include the oscillator circuitry in the motherboard chipset, so it might not be a visible separate component on newer boards. As voltage is applied to the quartz, it begins to vibrate (oscillate) at a harmonic rate dictated by the shape and size of the crystal (sliver). The oscillations emanate from the crystal in the form of a current that alternates at the harmonic rate of the crystal. This alternating current is the clock signal that forms the time base on which the computer operates. A typical computer system runs millions of these cycles per second, so speed is measured in megahertz. (One hertz is equal to one cycle per second.) An alternating current signal is like a sine wave, with the time between the peaks of each wave defining the frequency (see Figure 3.1).

Figure 3.1

Alternating current signal showing clock cycle timing.

Note

The hertz was named for the German physicist Heinrich Rudolf Hertz. In 1885,
Hertz confirmed the electromagnetic theory, which states that light is a form
of electromagnetic radiation and is propagated as waves.

A single cycle is the smallest element of time for the processor. Every action requires at least one cycle and usually multiple cycles. To transfer data to and from memory, for example, a modern processor such as the Pentium III needs a minimum of three cycles to set up the first memory transfer and then only a single cycle per transfer for the next three to six consecutive transfers. The extra cycles on the first transfer typically are called wait states. A wait state is a clock tick in which nothing happens. This ensures that the processor isn't getting ahead of the rest of the computer.

See "SIMMs, DIMMs, and RIMMs."

The time required to execute instructions also varies:

8086 and 8088. The original 8086 and 8088 processors take an average of 12
cycles to execute a single instruction.

286 and 386. The 286 and 386 processors improve this rate to about 4.5 cycles
per instruction.

486. The 486 and most other fourth-generation Intel-compatible processors,
such as the AMD 5x86, drop the rate further, to about 2 cycles per instruction.

Pentium, K6 series. The Pentium architecture and other fifth-generation
Intel-compatible processors, such as those from AMD and Cyrix, include twin
instruction pipelines and other improvements that provide for operation at one
or two instructions per cycle.

Pentium Pro, Pentium II/III/Celeron, and Athlon/Duron. These P6 class
processors, as well as other sixth-generation processors such as those from

AMD and Cyrix, can execute as many as three or more instructions per cycle.

Different instruction execution times (in cycles) make comparing systems based purely on clock speed or number of cycles per second difficult. How can two processors that run at the same clock rate perform differently with one running "faster" than the other? The answer is simple: efficiency.

The main reason the 486 was considered fast relative to a 386 is that it executes twice as many instructions in the same number of cycles. The same thing is true for a Pentium; it executes about twice as many instructions in a given number of cycles as a 486. Therefore, given the same clock speed, a Pentium is twice as fast as a 486, and consequently a 133MHz 486 class processor (such as the AMD 5x86-133) is not even as fast as a 75MHz Pentium! That is because Pentium megahertz are "worth" about double what 486 megahertz are worth in terms of instructions completed per cycle. The Pentium II and III are about 50% faster than an equivalent Pentium at a given clock speed because they can execute about that many more instructions in the same number of cycles.

Comparing relative processor performance, you can see that a 1GHz Pentium III is about equal to a (theoretical) 1.5GHz Pentium, which is about equal to a 3GHz 486, which is about equal to a 6GHz 386 or 286, which is about equal to a 12GHz 8088. The original PC's 8088 ran at only 4.77MHz; today, we have systems that are comparatively at least 2,500 times faster! As you can see, you must be careful in comparing systems based on pure MHz alone because many other factors affect system performance.

Evaluating CPU performance can be tricky. CPUs with different internal architectures do things differently and can be relatively faster at certain things and slower at others. To fairly compare various CPUs at different clock speeds, Intel has devised a specific series of benchmarks called the iCOMP (Intel Comparative Microprocessor Performance) index that can be run against processors to produce a relative gauge of performance. The iCOMP index benchmark has been updated twice and released in original iCOMP, iCOMP 2.0, and now iCOMP 3.0 versions. More information on benchmarks, including iCOMP, can be found on Intel's site at http://developer.intel.com/procs/perf/resources/spectrum.htm.

Table 3.5 shows the relative power, or iCOMP 2.0 index, for several processors.

Note

Note that this reflects the most recent iCOMP index. Intel is designing new
benchmarks that will show the power of the newer Pentium 4 and Itanium
processor when running software optimized for their internal architectures.

Table 3.5 Intel iCOMP 2.0 Index Ratings
ProcessoriCOMP 2.0 IndexProcessoriCOMP 2.0 Index
Pentium 7567Pentium Pro 200220
Pentium 10090Celeron 300226
Pentium 120100Pentium II 233267
Pentium 133111Celeron 300A296
Pentium 150114Pentium II 266303
Pentium 166127Celeron 333318
Pentium 200142Pentium II 300332
Pentium-MMX 166160Pentium II Overdrive 300351
Pentium Pro 150168Pentium II 333366
Pentium-MMX 200182Pentium II 350386
Pentium Pro 180197Pentium II Overdrive 333387
Pentium-MMX 233203Pentium II 400440
Celeron 266213Pentium II 450483

The iCOMP 2.0 index is derived from several independent benchmarks and is a stable indication of relative processor performance. The benchmarks balance integer with floating-point and multimedia performance.

Recently, Intel discontinued the iCOMP 2.0 index and released the iCOMP 3.0 index. iCOMP 3.0 is an updated benchmark that incorporates an increasing use of 3D, multimedia, and Internet technology and software, as well as the increasing use of rich data streams and compute-intensive applications, including 3D, multimedia, and Internet technology. iCOMP 3.0 combines six benchmarks: WinTune 98 Advanced CPU Integer test, CPUmark 99, 3D WinBench 99-3D Lighting and Transformation Test, MultimediaMark 99, Jmark 2.0 Processor Test, and WinBench 99-FPU WinMark. These newer benchmarks take advantage of the SSE (Streaming SIMD Extensions), additional graphics and sound instructions built into the PIII. Without taking advantage of these new instructions, the PIII would benchmark at about the same speed as a PII at the same clock rate.

Table 3.6 shows the iCOMP Index 3.0 ratings for Pentium II and III processors.

Table 3.6 Intel iCOMP 3.0 Ratings
ProcessoriCOMP 3.0 IndexProcessoriCOMP 3.0 Index
Pentium II 3501000Pentium III 6502270
Pentium II 4501240Pentium III 7002420
Pentium III 4501500Pentium III 7502540
Pentium III 5001650Pentium III 8002690
Pentium III 5501780Pentium III 8662890
Pentium III 6001930Pentium III 10003280
Pentium III 600E2110

Considerations When Interpreting iCOMP Scores

Each processor's rating is calculated at the time the processor is introduced,
using a particular, well-configured, commercially available system. Relative
iCOMP index 3.0 scores and actual system performance might be affected by
future changes in software design and configuration. Relative scores and
actual system performance also can be affected by differences in components or
characteristics of microprocessors, such as L2 cache, bus speed, extended
multimedia or graphics instructions, or improvements in the microprocessor
manufacturing process.

Differences in hardware components other than microprocessors used in the test
systems also can affect how iCOMP scores relate to actual system performance.
iCOMP 3.0 ratings cannot be compared with earlier versions of the iCOMP index
because different benchmarks and weightings are used in calculating the result.

Processor Speeds and Markings Versus Motherboard Speed

Another confusing factor when comparing processor performance is that virtually all modern processors since the 486DX2 run at some multiple of the motherboard speed. For example, a Celeron 600 runs at a multiple of nine times the motherboard speed of 66MHz, whereas a Pentium III 1GHz runs at 7 1/2 times the motherboard speed of 133MHz. Up until early 1998, most motherboards ran at 66MHz or less because that is all Intel supported with its processors until then. Starting in April 1998, Intel released both processors and motherboard chipsets designed to run at 100MHz. Cyrix has a few processors designed to run on 75MHz motherboards, and many Pentium motherboards are capable of running that speed as well, although technically Intel never supported it. AMD also has versions of the K6-2 designed to run at motherboard speeds of 100MHz.

Starting in late 1999, chipsets and motherboards running at 133MHz became available to support the newer Pentium III processors. At that time, AMD Athlon motherboards and chipsets were introduced running at 100MHz but using a double transfer technique for an effective 200MHz data rate between the Athlon processor and the main chipset North Bridge chip.

In 2000 and 2001, processor bus speeds advanced further to 266MHz for the AMD Athlon and Intel Itanium and up to 400MHz for the Pentium 4.

Some might wonder why the more powerful Itanium processor uses a slower CPU bus than the Pentium 4. Actually, I wonder that as well! My guess is because they were designed by completely different teams with completely different agendas. The Itanium was designed in conjunction with HP, and from the get-go it was intended to use double-data rate (DDR) memory, which runs at 266MHz because that was favored by the server community. Because matching the CPU bus to the memory bus allows for the best performance, a system using DDR SDRAM works best if the CPU bus is also at 266MHz.

The P4, on the other hand, was designed to use RDRAM, hence the quad-pumped bus matching RDRAM in speed. Note that these bus speeds can easily be changed in the future, just as virtually every other processor that Intel has released can be. So, for example, I fully expect the Itanium to come out in a quad-pumped version using quad-data rate (QDR) memory when that technology becomes available. The bottom line is that nobody outside of the chip maker's inner circle really knows why some of these things come out the way they do!

Note

See Chapter 4, "Motherboards and Buses," for more information on chipsets and
bus speeds.

Normally, you can set the motherboard speed and multiplier setting via jumpers or other configuration mechanism (such as BIOS setup) on the motherboard. Modern systems use a variable-frequency synthesizer circuit usually found in the main motherboard chipset to control the motherboard and CPU speed. Most Pentium motherboards have three or four speed settings. The processors used today are available in a variety of versions that run at different frequencies based on a given motherboard speed. For example, most of the Pentium chips run at a speed that is some multiple of the true motherboard speed. For example, Pentium processors and motherboards run at the speeds shown in Table 3.7.

Note

For information on specific AMD or Cyrix processors, see their respective
sections later in this chapter.

Table 3.7 Intel Processor and Motherboard Speeds
CPU TypeCPU Speed (MHz/GHz)CPU Clock MultiplierMotherboard Speed (MHz)
Pentium751.5x50
Pentium601x60
Pentium901.5x60
Pentium1202x60
Pentium1502.5x60
Pentium/Pentium Pro1803x60
Pentium661x66
Pentium1001.5x66
Pentium1332x66
Pentium/Pentium Pro1662.5x66
Pentium/Pentium Pro2003x66
Pentium/Pentium II2333.5x66
Pentium(Mobile)/Pentium II/Celeron2664x66
Pentium II/Celeron3004.5x66
Pentium II/Celeron3335x66
Pentium II/Celeron3665.5x66
Celeron4006x66
Celeron4336.5x66
Celeron4667x66
Celeron5007.5x66
Celeron5338x66
Celeron5668.5x66
Celeron6009x66
Celeron6339.5x66
Celeron66710x66
Celeron70010.5x66
Celeron73311x66
Celeron76611.5x66
Pentium II3503.5x100
Pentium II4004x100
Pentium II/III4504.5x100
Pentium III5005x100
Pentium III5505.5x100
Pentium III6006x100
Pentium III6506.5x100
Pentium III7007x100
Pentium III7507.5x100
Pentium III/Celeron8008x100
Pentium III/Celeron8508.5x100
Pentium III5334x133
Pentium III6004.5x133
Pentium III6675x133
Pentium III7335.5x133
Pentium III8006x133
Pentium III8666.5x133
Pentium III9337x133
Pentium III1.07.5x133
Pentium III1.068x133
Pentium III1.138.5x133
Pentium III1.29x133
Pentium III1.269.5x133
Pentium III1.3310x133
Pentium 41.3 3.25x400
Pentium 41.43.5x400
Pentium 41.53.75x400
Pentium 41.64x400
Pentium 41.74.25x400
Pentium 41.84.5x400
Pentium 41.94.75x400
Pentium 42.05x400
Pentium 42.15.25x400
Itanium7332.75x266
Itanium8003x266

If all other variables are equal—including the type of processor, the number of wait states (empty cycles) added to different types of memory accesses, and the width of the data bus—you can compare two systems by their respective clock rates. However, the construction and design of the memory controller (contained in the motherboard chipset) as well as the type and amount of memory installed can have an enormous effect on a system's final execution speed. In building a processor, a manufacturer tests it at various speeds, temperatures, and pressures. After the processor is tested, it receives a stamp indicating the maximum safe speed at which the unit will operate under the wide variation of temperatures and pressures encountered in normal operation. These ratings are clearly marked on the processor package.

Overclocking

In some systems, the processor speed can be set higher than the rating on the chip; this is called overclocking the chip. In many cases, you can get away with a certain amount of overclocking because Intel, AMD, and others often build safety margins into their ratings. So, a chip rated for, say, 800MHz might in fact run at 900MHz or more but is instead down-rated to allow for a greater margin of reliability. By overclocking, you are using this margin and running the chip closer to its true maximum speed. I don't normally recommend overclocking for a novice, but if you are comfortable with playing with your system, and you can afford and are capable of dealing with any potential consequences, overclocking might enable you to get more performance from your system.

If you are intent on overclocking, there are several issues to consider. One is that most Intel processors since the Pentium II have been multiplier-locked before they are shipped out. Therefore, any changes to the multiplier setting on the motherboard simply are ignored by the chip. Both Intel and AMD lock the multipliers on most of their newer processors. Although originally done to prevent re-markers from fraudulently relabeling processors, this has impacted the computing performance enthusiast, leaving tweaking the motherboard bus speed as the only way to achieve a clock speed higher than standard.

You can run into problems increasing motherboard bus speed as well. Intel motherboards, for example, simply don't support clock speeds other than the standard 66MHz, 100MHz, and 133MHz settings. Also all their boards with speed settings done via software (BIOS Setup) read the proper settings from the installed processor and only allow those settings. In other words, you simply plug in the processor, and the Intel motherboard won't allow any other settings other than what that processor is designed for.

Even if you could fool the processor into accepting a different setting, the jump from 66MHz to 100MHz, or from 100 to 133MHz, is a large one, and many processors would not make that much of a jump reliably. For example, a Pentium III 800E runs at a 100MHz bus speed with an 8x multiplier. Bumping the motherboard speed to 133MHz would cause the processor to try to run at 8x133 or 1066MHz. It is highly unlikely that the chip would run reliably at that speed. Likewise, a Celeron 600E runs at 9x66MHz. Raising the bus speed to 100MHz would cause the chip to try and run at 9x100MHz or 900MHz, likely an unsuccessful change.

What is needed is a board that supports intermediate speed settings and that allows the settings to be changed in smaller increments. This is because a given chip is generally overclockable by a certain percentage. The smaller steps you can take when increasing speed, the more likely that you'll be able to come close to the actual maximum speed of the chip without going over. For example, the Asus P3V4X motherboard supports front-side bus speed settings of 66MHz, 75MHz, 83MHz, 90MHz, 95MHz, 100MHz, 103MHz, 105MHz, 110MHz, 112MHz, 115MHz, 120MHz, 124MHz, 133MHz, 140MHz, and 150MHz. By setting the 800MHz Pentium IIIE to increments above 100MHz, you'd have:
Multiplier (fixed)Bus SpeedProcessor Speed
8x100MHz800MHz
8x103MHz824MHz
8x105MHz840MHz
8x110MHz880MHz
8x112MHz896MHz
8x115MHz920MHz
8x120MHz960MHz
8x124MHz992MHz
8x133MHz1066MHz

Likewise, using this motherboard with a Celeron 600, you could try settings above the standard 66MHz bus speed as follows:
Multiplier (fixed)Bus SpeedProcessor Speed
9x66MHz600MHz
9x75MHz675MHz
9x83MHz747MHz
9x90MHz810MHz
9x95MHz855MHz
9x100MHz900MHz

Typically, a 10%–20% increase is successful, so with this motherboard, you are likely to get your processor running 100MHz or more faster than it was originally designed for.

Another trick used by overclockers is to play with the voltage settings for the CPU. All Slot 1, Slot A, Socket 8, Socket 370, and Socket A processors have automatic voltage detection, where the system will detect and set the correct voltage by reading certain pins on the processor. Some motherboards, such as those made by Intel, do not allow any changes to these settings manually. Other motherboards, such as the Asus P3V4X I mentioned earlier, allow you to tweak the voltage settings from the automatic setting up or down by tenths of a volt. Some experimenters have found that by either increasing or decreasing voltage slightly from the standard, a higher speed of overclock can be achieved with the system running stable.

My recommendation is to be careful when playing with voltages. You can damage the chip in this manner. Even without changing voltage, overclocking with an adjustable bus speed motherboard is very easy and fairly rewarding. I do recommend you make sure you are using a high-quality board, good memory, and especially a good system chassis with additional cooling fans and a heavy-duty power supply. See Chapter 21, "Power Supply and Chassis/Case," for more information on upgrading power supplies and chassis. Especially when overclocking, it is essential that the system components and especially the CPU remain properly cooled. Going a little bit overboard on the processor heatsink and adding extra cooling fans to the case never hurts and in many cases helps a great deal when hotrodding a system in this manner.

Note

One good source of online overclocking information is located at
http://www.tomshardware.com. It includes, among other things, fairly thorough
overclocking FAQs and an ongoing survey of users who have successfully (and
sometimes unsuccessfully) overclocked their CPUs. Note that many of the newer
Intel processors incorporate fixed bus multiplier ratios, which effectively
prevent or certainly reduce the ability to overclock. Unfortunately, this can
be overridden with a simple hardware fix, and many counterfeit processor
vendors are selling re-marked (overclocked) chips.

The Processor Heatsink Might Hide the Rating

Most processors have heatsinks on top of them, which can prevent you from
reading the rating printed on the chip.
A heatsink is a metal device that draws heat away from an electronic device.
Most processors running at 50MHz and faster should have a heatsink installed
to prevent the processor from overheating.
Fortunately, most CPU manufacturers are placing marks on the top and bottom of
the processor. If the heatsink is difficult to remove from the chip, you can
take the heatsink and chip out of the socket together and read the markings on
the bottom of the processor to determine what you have.

Cyrix P-Ratings

Cyrix/IBM 6x86 processors use a PR (performance rating) scale that is not equal to the true clock speed in megahertz. For example, the Cyrix 6x86MX/MII-PR366 actually runs at only 250MHz (2.5 x 100MHz). This is a little misleading—you must set up the motherboard as if a 250MHz processor were being installed, not the 366MHz you might suspect. Unfortunately, this leads people to believe these systems are faster than they really are. Table 3.8 shows the relationship between the Cyrix 6x86, 6x86MX, and M-II P-Ratings versus the actual chip speeds in MHz.

Table 3.8 Cyrix P-Ratings Versus Actual Chip Speeds in MHz
CPU TypeP-RatingActual CPU Speed (MHz)Clock MultiplierMotherboard Speed
(MHz)
6x86PR90802x40
6x86PR1201002x50
6x86PR1331102x55
6x86PR1501202x60
6x86PR1661332x66
6x86PR2001502x75
6x86MXPR1331002x50
6x86MXPR1331102x55
6x86MXPR1501202x60
6x86MXPR1501252.5x50
6x86MXPR1661332x66
6x86MXPR166137.52.5x55
6x86MXPR1661503x50
6x86MXPR1661502.5x60
6x86MXPR2001502x75
6x86MXPR2001653x55
6x86MXPR2001662.5x66
6x86MXPR2001803x60
6x86MXPR2331662x83
6x86MXPR233187.52.5x75
6x86MXPR2332003x66
6x86MXPR266207.52.5x83
6x86MXPR2662253x75
6x86MXPR2662333.5x66
M-IIPR3002253x75
M-IIPR3002333.5x66
M-IIPR3332503x83
M-IIPR3662502.5x100
M-IIPR4002853x95
M-IIPR4333003x100
Cyrix IIIPR4333503.5x100
Cyrix IIIPR4663663x122
Cyrix IIIPR5004003x133
Cyrix IIIPR5334333.5x124
Cyrix IIIPR5334504.5x100

Note that a given P-Rating can mean several different actual CPU speeds—for example, a Cyrix 6x86MX-PR200 might actually be running at 150MHz, 165MHz, 166MHz, or 180MHz, but not at 200MHz.

This P-Rating is supposed to indicate speed in relation to an Intel Pentium processor, but the processor being compared to is the original non-MMX, small L1 cache version running on an older motherboard platform with an older chipset and slower technology memory. The P-Rating does not compare well against the Celeron, Pentium II, or Pentium III processors. In that case these chips are more comparative at their true speeds. In other words, the MII-PR366 really runs at only 250MHz and compares well against Intel processors running at closer to that speed. I consider calling a chip an MII-366 when it really runs at only 250MHz very misleading, to say the least.

AMD P-Ratings

Although both AMD and Cyrix concocted this misleading P-Rating system, AMD thankfully used it for only a short time and only on the older K5 processor. It still has the PR designation stamped on its newer chips, but all K6 and Athlon processors have PR numbers that match their actual CPU speeds in MHz. Table 3.9 shows the P-Rating and actual speeds of the AMD K5, K6, and Athlon processors.

Table 3.9 AMD P-Ratings Versus Actual Chip Speeds in MHz
CPU TypeP-RatingActual CPU Speed (MHz)Clock MultiplierMotherboard Speed
(MHz)
K5PR75751.5x50
K5PR90901.5x60
K5PR1001001.5x66
K5PR120901.5x60
K5PR1331001.5x66
K5PR166116.71.75x66
K6PR1661662.5x66
K6PR2002003x66
K6PR2332333.5x66
K6PR2662664x66
K6PR3003004.5x66
K6-2PR2332333.5x66
K6-2PR2662664x66
K6-2PR3003004.5x66
K6-2PR3003003x100
K6-2PR3333335x66
K6-2PR3333333.5x95
K6-2PR3503503.5x100
K6-2PR3663665.5x66
K6-2PR3803804x95
K6-2PR4004006x66
K6-2PR4004004x100
K6-2PR4504504.5x100
K6-2PR4754755x95
K6-2PR5005005x100
K6-2PR5335335.5x97
K6-2PR5505505.5x100
K6-3PR4004004x100
K6-3PR4504504.5x100
AthlonPR5005002.5x200
AthlonPR5505502.75x200
Athlon/DuronPR6006003x200
Athlon/DuronPR6506503.25x200
Athlon/DuronPR7007003.5x200
Athlon/DuronPR7507503.75x200
Athlon/DuronPR8008004x200
Athlon/DuronPR8508504.25x200
Athlon/DuronPR9009004.5x200
Athlon/DuronPR9509504.75x200
Athlon/DuronPR10001.05x200
AthlonPR11001.15.5x200
AthlonPR12001.26x200
AthlonPR13001.36.5x200
AthlonPR10001.03.75x266
AthlonPR11331.134.25x266
AthlonPR12001.24.5x266
AthlonPR13331.335x266

Note the Athlon to North Bridge processor bus actually runs at a double (2x) transfer speed, which is twice that of actual the motherboard clock speed.

Data Bus

Perhaps the most common way to describe a processor is by the speed at which it runs and the width of the processor's external data bus. This defines the number of data bits that can be moved into or out of the processor in one cycle. A bus is a series of connections that carry common signals. Imagine running a pair of wires from one end of a building to another. If you connect a 110v AC power generator to the two wires at any point and place outlets at convenient locations along the wires, you have constructed a power bus. No matter into which outlet you plug the wires, you have access to the same signal, which in this example is 110v AC power. Any transmission medium that has more than one outlet at each end can be called a bus. A typical computer system has several internal and external buses.

The processor bus discussed most often is the external data bus—the bundle of wires (or pins) used to send and receive data. The more signals that can be sent at the same time, the more data can be transmitted in a specified interval and, therefore, the faster (and wider) the bus. A wider data bus is like having a highway with more lanes, which enables greater throughput.

Data in a computer is sent as digital information consisting of a time interval in which a single wire carries 5v to signal a 1 data bit, or 0v to signal a 0 data bit. The more wires you have, the more individual bits you can send in the same time interval. A chip such as the 286 or 386SX, which has 16 wires for transmitting and receiving such data, has a 16-bit data bus. A 32-bit chip, such as the 386DX and 486, has twice as many wires dedicated to simultaneous data transmission as a 16-bit chip; a 32-bit chip can send twice as much information in the same time interval as a 16-bit chip. Modern processors such as the Pentium series have 64-bit external data buses. This means that all processors from the Pentium to the Athlon, Pentium 4, or Itanium can transfer 64 bits of data at a time to and from the system memory.

A good way to understand this flow of information is to consider a highway and the traffic it carries. If a highway has only one lane for each direction of travel, only one car at a time can move in a certain direction. If you want to increase traffic flow, you can add another lane so that twice as many cars pass in a specified time. You can think of an 8-bit chip as being a single-lane highway because 1 byte flows through at a time. (One byte equals 8 individual bits.) The 16-bit chip, with 2 bytes flowing at a time, resembles a two-lane highway. You might have four lanes in each direction to move a large number of automobiles; this structure corresponds to a 32-bit data bus, which has the capability to move 4 bytes of information at a time. Taking this further, a 64-bit data bus is like having an 8-lane highway moving data in and out of the chip!

Just as you can describe a highway by its lane width, you can describe a chip by the width of its data bus. When you read an advertisement that describes a 32-bit or 64-bit computer system, the ad usually refers to the CPU's data bus. This number provides a rough idea of the chip's performance potential (and, therefore, the system).

Perhaps the most important ramification of the data bus in a chip is that the width of the data bus also defines the size of a bank of memory. So, a 32-bit processor, such as the 486 class chips, reads and writes memory 32 bits at a time. Pentium-class processors, including the Pentium III and Celeron, read and write memory 64 bits at a time. Because standard 72-pin single inline memory modules (SIMMs) are only 32 bits wide, they must be installed one at a time in most 486 class systems; they're installed two at a time in most Pentium class systems. Newer dual inline memory modules (DIMMs) are 64 bits wide, so they are installed one at a time in Pentium class systems. Each DIMM is equal to a complete bank of memory in Pentium systems, which makes system configuration easy because they can then be installed or removed one at a time.

See "Memory Banks."

Internal Registers (Internal Data Bus)

The size of the internal registers indicate how much information the processor can operate on at one time and how it moves data around internally within the chip. This is sometimes also referred to as the internal data bus. The register size is essentially the same as the internal data bus size. A register is a holding cell within the processor; for example, the processor can add numbers in two different registers, storing the result in a third register. The register size determines the size of data on which the processor can operate. The register size also describes the type of software or commands and instructions a chip can run. That is, processors with 32-bit internal registers can run 32-bit instructions that are processing 32-bit chunks of data, but processors with 16-bit registers cannot. Most advanced processors today—chips from the 386 to the Pentium 4—use 32-bit internal registers and can therefore run the same 32-bit operating systems and software. The new Itanium processor has 64-bit internal registers, which require new operating systems and software to fully utilize.

Some processors have an internal data bus (made up of data paths and storage units called registers) that is larger than the external data bus. The 8088 and 386SX are examples of this structure. Each chip has an internal data bus twice the width of the external bus. These designs, which sometimes are called hybrid designs, usually are low-cost versions of a "pure" chip. The 386SX, for example, can pass data around internally with a full 32-bit register size; for communications with the outside world, however, the chip is restricted to a 16-bit-wide data path. This design enables a systems designer to build a lower-cost motherboard with a 16-bit bus design and still maintain software and instruction set compatibility with the full 32-bit 386.

Internal registers often are larger than the data bus, which means the chip requires two cycles to fill a register before the register can be operated on. For example, both the 386SX and 386DX have internal 32-bit registers, but the 386SX must "inhale" twice (figuratively) to fill them, whereas the 386DX can do the job in one "breath." The same thing would happen when the data is passed from the registers back out to the system bus.

The Pentium is an example of this type of design. All Pentiums have a 64-bit data bus and 32-bit registers—a structure that might seem to be a problem until you understand that the Pentium has two internal 32-bit pipelines for processing information. In many ways, the Pentium is like two 32-bit chips in one. The 64-bit data bus provides for very efficient filling of these multiple registers. Multiple pipelines are called superscalar architecture, which was introduced with the Pentium processor.

See "Pentium Processors."

More advanced sixth-generation processors, such as the Pentium Pro and Pentium II/III, have as many as six internal pipelines for executing instructions. Although some of these internal pipes are dedicated to special functions, these processors can still execute as many as three instructions in one clock cycle. The newest Itanium processor uses 10-stage parallel pipelines, which enable it to execute as many as 20 operations per clock cycle.

Address Bus

The address bus is the set of wires that carries the addressing information used to describe the memory location to which the data is being sent or from which the data is being retrieved. As with the data bus, each wire in an address bus carries a single bit of information. This single bit is a single digit in the address. The more wires (digits) used in calculating these addresses, the greater the total number of address locations. The size (or width) of the address bus indicates the maximum amount of RAM that a chip can address. The highway analogy can be used to show how the address bus fits in. If the data bus is the highway and the size of the data bus is equivalent to the number of lanes, the address bus relates to the house number or street address. The size of the address bus is equivalent to the number of digits in the house address number. For example, if you live on a street in which the address is limited to a two-digit (base 10) number, no more than 100 distinct addresses (00–99) can exist for that street (102). Add another digit, and the number of available addresses increases to 1,000 (000–999), or 103.

Computers use the binary (base 2) numbering system, so a two-digit number provides only four unique addresses (00, 01, 10, and 11), calculated as 22. A three-digit number provides only eight addresses (000–111), which is 23. For example, the 8086 and 8088 processors use a 20-bit address bus that calculates as a maximum of 220 or 1,048,576 bytes (1MB) of address locations. Table 3.10 describes the memory-addressing capabilities of processors.

Table 3.10 Processor Memory-Addressing Capabilities
Processor FamilyAddress BusBytesKilobytes (KB)Megabytes (MB)Gigabytes
(GB)Terabytes (TB)
8088 808620-bit1,048,5761,0241——
286 386SX24-bit16,777,21616,38416——
386DX 486 58632-bit4,294,967,2964,194,3044,0964—
686 78636-bit68,719,476,73667,108,86465,53664—
Itanium44-bit17,592,186,044,41617,179,869,18416,777,21616,38416

Note: The Pentium and AMD K6 are 586 (fifth-generation) processors. The Pentium Pro/II/III/Celeron and AMD Athlon/Duron are 686 (sixth-generation) processors, and the Pentium 4 is considered a 786 (seventh-generation) processor. The data bus and address bus are independent, and chip designers can use whatever size they want for each. Usually, however, chips with larger data buses have larger address buses. The sizes of the buses can provide important information about a chip's relative power, measured in two important ways. The size of the data bus is an indication of the chip's information-moving capability, and the size of the address bus tells you how much memory the chip can handle.

Internal Level 1 Cache

All modern processors starting with the 486 family include an integrated L1 cache and controller. The integrated L1 cache size varies from processor to processor, starting at 8KB for the original 486DX and now up to 32KB, 64KB, or more in the latest processors.

Because L1 cache is always built into the processor die, it runs at the full-core speed of the processor internally. By full-core speed, I mean this cache runs at the higher clock multiplied internal processor speed rather than the external motherboard speed. This cache basically is an area of very fast memory built into the processor and is used to hold some of the current working set of code and data. Cache memory can be accessed with no wait states because it is running at the same speed as the processor core.

Using cache memory reduces a traditional system bottleneck because system RAM often is much slower than the CPU. This prevents the processor from having to wait for code and data from much slower main memory, therefore improving performance. Without the L1 cache, a processor frequently would be forced to wait until system memory caught up.

L1 cache is even more important in modern processors because it is often the only memory in the entire system that can truly keep up with the chip. Most modern processors are clock multiplied, which means they are running at a speed that is really a multiple of the motherboard into which they are plugged. The Pentium III 1GHz, for example, runs at a multiple of 7 1/2 times the true motherboard speed of 133MHz. Because the main memory is plugged into the motherboard, it can also run at only 133MHz maximum. The only 1GHz memory in such a system is the L1 and L2 caches built into the processor core. In this example, the Pentium III 1GHz processor has 32KB of integrated L1 cache in two separate 16KB blocks and 256KB of L2, all running at the full speed of the processor core.

See "Memory Module Speed."

If the data the processor wants is already in the internal cache, the CPU does not have to wait. If the data is not in the cache, the CPU must fetch it from the Level 2 cache or (in less sophisticated system designs) from the system bus, meaning main memory directly.

To understand the importance of cache, you need to know the relative speeds of processors and memory. The problem with this is that processor speed usually is expressed in MHz (millions of cycles per second), whereas memory speeds often are expressed in nanoseconds (billionths of a second per cycle).

Both are really time- or frequency-based measurements, and a chart comparing them can be found in Chapter 6, "Memory," Table 6.3. In this table, you will note that a 233MHz processor equates to 4.3 nanosecond cycling, which means you would need 4ns memory to keep pace with a 200MHz CPU. Also note that the motherboard of a 233MHz system typically runs at 66MHz, which corresponds to a speed of 15ns per cycle, and requires 15ns memory to keep pace. Finally note that 60ns main memory (common on many Pentium class systems) equates to a clock speed of approximately 16MHz. So in a typical Pentium 233 system, you have a processor running at 233MHz (4.3ns per cycle), a motherboard running at 66MHz (15ns per cycle), and main memory running at 16MHz (60ns per cycle).

How Cache Works

To learn how the L1 and L2 caches work, consider the following analogy. This story involves a person (in this case you) eatin g food to act as the processor requesting and operating on data from memory. The kitchen where the food is prepared is the main memory (SIMM/DIMM) RAM. The cache controller is the waiter, and the L1 cache is the table at which you are seated. L2 cache is introduced as a food cart, which is positioned between your table and the kitchen.

Okay, here's the story. Say you start to eat at a particular restaurant every day at the same time. You come in, sit down, and order a hot dog. To keep this story proportionately accurate, let's say you normally eat at the rate of one bite (byte? ) every four seconds (233MHz = about 4ns cycling). It also takes 60 seconds for the kitchen to produce any given item that you order (60ns main memory).

So, when you first arrive, you sit down, order a hot dog, and you have to wait for 60 seconds for the food to be produced before you can begin eating. After the waiter brings the food, you start eating at your normal rate. Pretty quickly you finish the hot dog, so you call the waiter and order a hamburger. Again you wait 60 seconds while the hamburger is being produced. When it arrives, you again begin eating at full speed. After you finish the hamburger, you order a plate of fries. Again you wait, and after it is delivered 60 seconds later, you eat it at full speed. Finally, you decide to finish the meal and order cheesecake for dessert. After another 60-second wait, you can again eat dessert at full speed. Your overall eating experience consists of mostly a lot of waiting, followed by short bursts of actual eating at full speed.

After coming into the restaurant for two consecutive nights at exactly 6 p.m. and ordering the same items in the same order each time, on the third night the waiter begins to think; "I know this guy is going to be here at 6 p.m., order a hot dog, a hamburger, fries, and then cheesecake. Why don't I have these items prepared in advance and surprise him, maybe I'll get a big tip?" So you enter the restaurant and order a hot dog, and the waiter immediately puts it on your plate, with no waiting! You then proceed to finish the hot dog and right as you are about to request the hamburger, the waiter deposits one on your plate. The rest of the meal continues in the same fashion, and you eat the entire meal, taking a bite every four seconds, and never have to wait for the kitchen to prepare the food. Your overall eating experience this time consists of all eating, with no waiting for the food to be prepared, due primarily to the intelligence and thoughtfulness of your waiter.

This analogy exactly describes the function of the L1 cache in the processor. The L1 cache itself is the table that can contain one or more plates of food. Without a waiter, the space on the table is a simple food buffer. When stocked, you can eat until the buffer is empty, but nobody seems to be intelligently refilling it. The waiter is the cache controller who takes action and adds the intelligence to decide which dishes are to be placed on the table in advance of your needing them. Like the real cache controller, he uses his skills to literally guess which food you will require next, and if and when he guesses right, you never have to wait.

Let's now say on the fourth night you arrive exactly on time and start off with the usual hot dog. The waiter, by now really feeling confident, has the hot dog already prepared when you arrive, so there is no waiting.

Just as you finish the hot dog, and right as he is placing a hamburger on your plate, you say "Gee, I'd really like a bratwurst now; I didn't actually order this hamburger." The waiter guessed wrong, and the consequence is that this time you have to wait the full 60 seconds as the kitchen prepares your brat. This is known as a cache miss, in which the cache controller did not correctly fill the cache with the data the processor actually needed next. The result is waiting, or in the case of a sample 233MHz Pentium system, the system essentially throttles back to 16MHz (RAM speed) whenever a cache miss occurs. According to Intel, the L1 cache in most of its processors has approximately a 90% hit ratio. This means that the cache has the correct data 90% of the time, and consequently the processor runs at full speed—233MHz in this example—90% of the time. However, 10% of the time the cache controller guesses wrong and the data has to be retrieved out of the significantly slower main memory, meaning the processor has to wait. This essentially throttles the system back to RAM speed, which in this example was 60ns or 16MHz.

In this analogy, the processor was 14 times faster than the main memory. Memory speeds have increased from 16MHz (60ns) to 266MHz (3.8ns), but processor speeds have also risen to 2GHz and beyond, so even in the latest systems, memory is still 7.5 or more times SLOWER than the processor. Cache is what makes up the difference.

The main feature of L1 cache is that it has always been integrated into the processor core, where it runs at the same speed as the core. This, combined with the hit ratio of 90% or greater, makes L1 cache very important for system performance.

Level 2 Cache

To mitigate the dramatic slowdown every time an L1 cache miss occurs, a secondary (L2) cache can be employed.

Using the restaurant analogy I used to explain L1 cache in the previous section, I'll equate the L2 cache to a cart of additional food items placed strategically such that the waiter can retrieve food from it in 15 seconds. In an actual Pentium class (Socket 7) system, the L2 cache is mounted on the motherboard, which means it runs at motherboard speed—66MHz, or 15ns in this example. Now, if you ask for an item the waiter did not bring in advance to your table, instead of making the long trek back to the kitchen to retrieve the food and bring it back to you 60 seconds later, he can first check the cart where he has placed additional items. If the requested item is there, he will return with it in only 15 seconds. The net effect in the real system is that instead of slowing down from 233MHz to 16MHz waiting for the data to come from the 60ns main memory, the data can instead be retrieved from the 15ns (66MHz) L2 cache. The effect is that the system slows down from 233MHz to 66MHz.

Just as with the L1 cache, most L2 caches have a hit ratio also in the 90% range; therefore, if you look at the system as a whole, 90% of the time it will be running at full speed (233MHz in this example) by retrieving data out of the L1 cache. Ten percent of the time it will slow down to retrieve the data from the L2 cache. Ninety percent of the time the processor goes to the L2 cache, the data will be in the L2, and 10% of that time it will have to go to the slow main memory to get the data because of an L2 cache miss. So, by combining both caches, our sample system runs at full processor speed 90% of the time (233MHz in this case), at motherboard speed 9% (90% of 10%) of the time (66MHz in this case), and at RAM speed about 1% (10% of 10%) of the time (16MHz in this case). You can clearly see the importance of both the L1 and L2 caches; without them the system uses main memory more often, which is significantly slower than the processor.

This brings up other interesting points. If you could spend money doubling the performance of either the main memory (RAM) or the L2 cache, which would you improve? Considering that main memory is used directly only about 1% of the time, if you doubled performance there, you would double the speed of your system only 1% of the time! That doesn't sound like enough of an improvement to justify much expense. On the other hand, if you doubled L2 cache performance, you would be doubling system performance 9% of the time, a much greater improvement overall. I'd much rather improve L2 than RAM performance.

The processor and system designers at Intel and AMD know this and have devised methods of improving the performance of L2 cache. In Pentium (P5) class systems, the L2 cache usually was found on the motherboard and had to therefore run at motherboard speed. Intel made the first dramatic improvement by migrating the L2 cache from the motherboard directly into the processor and initially running it at the same speed as the main processor. The cache chips were made by Intel and mounted next to the main processor die in a single chip housing. This proved too expensive, so with the Pentium II Intel began using cache chips from third-party suppliers such as Sony, Toshiba, NEC, Samsung, and others. Because these were supplied as complete packaged chips and not raw die, Intel mounted them on a circuit board alongside the processor. This is why the Pentium II was designed as a cartridge rather than what looked like a chip.

One problem was the speed of the available third-party cache chips. The fastest ones on the market were 3ns or higher, meaning 333MHz or less in speed. Because the processor was being driven in speed above that, in the Pentium II and initial Pentium III processors Intel had to run the L2 cache at half the processor speed because that is all the commercially available cache memory could handle. AMD followed suit with the Athlon processor, which had to drop L2 cache speed even further in some models to two-fifths or one-third the main CPU speed to keep the cache memory speed less than the 333MHz commercially available chips.

Then a breakthrough occurred, which first appeared in the Celeron processor 300A and above. These had 128KB of L2 cache, but no external chips were used. Instead, the L2 cache had been integrated directly into the processor core just like the L1. Consequently, both the L1 and L2 caches now would run at full processor speed, and more importantly scale up in speed as the processor speeds increased in the future. In the newer Pentium III, as well as all the Xeon and Celeron processors, the L2 cache runs at full processor core speed, which means there is no waiting or slowing down after an L1 cache miss. AMD also achieved full-core speed on-die cache in its later Athlon and Duron chips. Using on-die cache improves performance dramatically because the 9% of the time the system would be using the L2 it would now remain at full speed instead of slowing down to one-half or less the processor speed or, even worse, slow down to motherboard speed as in Socket 7 designs. Another benefit of on-die L2 cache is cost, which is less because now fewer parts are involved.

Let's revisit the restaurant analogy using a modern Pentium III 1GHz. You would now be taking a bite every one second (1GHz = 1ns cycling). The L1 cache would also be running at that speed, so you could eat anything on your table at that same rate (the table = L1 cache). The real jump in speed comes when you want something that isn't already on the table (L1 cache miss), in which case the waiter runs to the cart and returns nine out of ten times with the food you want in only one second (L2 speed = 1GHz or 1ns cycling). In this more modern system, you would run at 1GHz 99% of the time (L1 and L2 hit ratios combined) and slow down to RAM speed (wait for the kitchen) only 1% of the time as before. With faster memory running at 133MHz (7.5ns), you would have to wait only 7.5 seconds for the food to come from the kitchen. If only restaurant performance increased at the same rate processor performance has!

Cache Organization

The organization of the cache memory in the 486 and Pentium family is called a four-way set associative cache, which means that the cache memory is split into four blocks. Each block also is organized as 128 or 256 lines of 16 bytes each. To understand how a four-way set associative cache works, consider a simple example. In the simplest cache design, the cache is set up as a single block into which you can load the contents of a corresponding block of main memory. This procedure is similar to using a bookmark to locate the current page of a book you are reading. If main memory equates to all the pages in the book, the bookmark indicates which pages are held in cache memory. This procedure works if the required data is located within the pages marked with the bookmark, but it does not work if you need to refer to a previously read page. In that case, the bookmark is of no use.

An alternative approach is to maintain multiple bookmarks to mark several parts of the book simultaneously. Additional hardware overhead is associated with having multiple bookmarks, and you also have to take time to check all the bookmarks to see which one marks the pages of data you need. Each additional bookmark adds to the overhead but also increases your chance of finding the desired pages.

If you settle on marking four areas in the book, you have essentially constructed a four-way set associative cache. This technique splits the available cache memory into four blocks, each of which stores different lines of main memory. Multitasking environments, such as Windows, are good examples of environments in which the processor needs to operate on different areas of memory simultaneously and in which a four-way cache improves performance greatly.

The contents of the cache must always be in sync with the contents of main memory to ensure that the processor is working with current data. For this reason, the internal cache in the 486 family is a write-through cache.

Write-through means that when the processor writes information out to the cache, that information is automatically written through to main memory as well. By comparison, the Pentium and later chips have an internal write-back cache, which means that both reads and writes are cached, further improving performance. Even though the internal 486 cache is write-through, the system can employ an external write-back cache for increased performance. In addition, the 486 can buffer up to 4 bytes before actually storing the data in RAM, improving efficiency in case the memory bus is busy.

Another feature of improved cache designs is that they are nonblocking. This is a technique for reducing or hiding memory delays by exploiting the overlap of processor operations with data accesses. A nonblocking cache enables program execution to proceed concurrently with cache misses as long as certain dependency constraints are observed. In other words, the cache can handle a cache miss much better and enable the processor to continue doing something nondependent on the missing data.

The cache controller built into the processor also is responsible for watching the memory bus when alternative processors, known as bus masters, are in control of the system. This process of watching the bus is referred to as bus snooping. If a bus master device writes to an area of memory that also is stored in the processor cache currently, the cache contents and memory no longer agree. The cache controller then marks this data as invalid and reloads the cache during the next memory access, preserving the integrity of the system.

A secondary external L2 cache of extremely fast static RAM (SRAM) chips also is used in most systems. It further reduces the amount of time the CPU must spend waiting for data from system memory. The function of the secondary processor cache is similar to that of the onboard cache. The secondary processor cache holds information that is moving to the CPU, thereby reducing the time the CPU spends waiting and increasing the time the CPU spends performing calculations. Fetching information from the secondary processor cache rather than from system memory is much faster because of the SRAM chips' extremely fast speed—15 nanoseconds (ns) or less.

Pentium systems incorporate the secondary cache on the motherboard, whereas Pentium Pro and later systems have the secondary cache inside the processor package. By moving the L2 cache into the processor, systems are capable of running at speeds higher than the motherboard—up to as fast as the processor core.

As clock speeds increase, cycle time decreases. Most SIMM memory used in Pentium and earlier systems was 60ns, which works out to be only about 16MHz! Standard motherboard speeds are now 66MHz, 100MHz, or 133MHz, and processors are available at 600MHz or more. Newer systems don't use cache on the motherboard any longer because the faster SDRAM or RDRAM used in modern Pentium Celeron/II/III systems can keep up with the motherboard speed. The trend today is toward integrating the L2 cache into the processor die just like the L1 cache. This enables the L2 to run at full-core speed because it is now a part of the core. Cache speed is always more important than size. The rule is that a smaller but faster cache is always better than a slower but bigger cache. Table 3.11 illustrates the need for and function of L1 (internal) and L2 (external) caches in modern systems.