Table of Contents
| About This Book | |
| Ch. 1 | Architectural Perspective | |
| Ch. 2 | Architecture Overview | |
| Ch. 3 | Address Spaces & Transaction Routing | |
| Ch. 4 | Packet-Based Transactions | |
| Ch. 5 | ACK/NAK Protocol | |
| Ch. 6 | QoS/TCs/VCs and Arbitration | |
| Ch. 7 | Flow Control | |
| Ch. 8 | Transaction Ordering | |
| Ch. 9 | Interrupts | |
| Ch. 10 | Error Detection and Handling | |
| Ch. 11 | Physical Layer Logic | |
| Ch. 12 | Electrical Physical Layer | |
| Ch. 13 | System Reset | |
| Ch. 14 | Link Initialization & Training | |
| Ch. 15 | Power Budgeting | |
| Ch. 16 | Power Management | |
| Ch. 17 | Hot Plug | |
| Ch. 18 | Add-in Cards and Connectors | |
| Ch. 19 | Configuration Overview | |
| Ch. 20 | Configuration Mechanisms | |
| Ch. 21 | PCI Express Enumeration | |
| Ch. 22 | PCI Compatible Configuration Registers | |
| Ch. 23 | Expansion ROMs | |
| Ch. 24 | Express-Specific Configuration Registers | |
| App. A | Test, Debug and Verification | |
| App. B | Markets & Applications for the PCI Express Architecture | |
| App. C | Implementing Intelligent Adapters and Multi-Host Systems With PCI Express Technology | |
| App. D | Class Codes | |
| App. E | Locked Transactions Series | |
| Index | |
Forewords & Introductions
The MindShare Architecture Series
The MindShare Architecture book series currently includes the books listed below. The entire book series is published by Addison-Wesley.
- Books about Processor Architecture:
- 80486 System Architecture, Third Edition, 0-201-40994-1
- Pentium Processor System Architecture, Second Edition, 0-201-40992-5
- Pentium Pro and Pentium II System Architecture, Second Edition, 0-201-30973-4
- Power PC System Architecture, 0-201-40990-9
- Books About Bus Architecture:
- PCI System Architecture, Fourth Edition, 0-201-30974-2
- PCI-X System Architecture, 0-201-72682-3
- EISA System Architecture, 0-201-40995-X--Out-of-print
- Firewire System Architecture, Second Edition: IEEE 1394a, 0-201-48535-4
- ISA System Architecture, Third Edition, 0-201-40996-8
- Universal Serial Bus System Architecture 2.0, 0-201-46137-4
- HyperTransport™ System Architecture, 0-321-16845-3
- PCI Express System Architecture, 0-321-15630-7
- Books About Network Architecture:
- Network Architecture Infiniband Network Architecture, 0-321-11765-4
- Books About Other Architectures:
- PCMCIA System Architecture, Second Edition: 16-Bit PC Cards, 0-201-40991-7
- CardBus System Architecture, 0-201-40997-6
- Plug and Play System ArchitectureSoftware Architecture, 0-201-55447-X
- AGP System Architecture, 0-201-37964-3
Cautionary Note
The reader should keep in mind that MindShare's book series often details rapidly evolving technologies, as is the case with PCI Express. This being the case, it should be recognized that the book is a "snapshot" of the state of the technology at the time the book was completed. We make every attempt to produce our books on a timely basis, but the next revision of the specification is not introduced in time to make necessary changes. This PCI Express book complies with revision 1.0a of the PCI Express™ Base Specification released and trademarked by the PCI Special Interest Group. Several expansion card form-factor specifications are planned for PCI Express, but only the Electro-mechanical specification, revision 1.0 was released when this book was completed. However, the chapter covering the Card Electromechanical topic reviews several form-factors that were under development at the time of writing.
Intended Audience
This book is intended for use by hardware and software design and support personnel. The tutorial approach taken may also make it useful to technical personnel not directly involved design, verification, and other support functions.
Prerequisite Knowledge
It is recommended that the reader has a reasonable background in PC architecture, including experience or knowledge of an I/O bus and related protocol. Because PCI Express maintains several levels of compatibility with the original PCI design, critical background information regarding PCI has been incorporated into this book. However, the reader may find i beneficial to read the MindShare publication entitled PCI System Architecture, which focusses on and details the PCI architecture.
Topics and Organization
Topics covered in this book and the flow of the book are as follows:
- Part 1: Background and Comprehensive Overview. Provides an architectural perspective of the PCI Express technology by comparing and contrasting it with the PCI and PCI-X buses. It also introduces the major features of the PCI Express architecture.
- Part 2: PCI Express Transaction Protocol. Includes packet format and field definition and use, along with transaction and link layer functions.
- Part 3: Physical Layer Description. Describes the physical layer functions, link training and initialization, reset, and electrical signaling.
- Part 4: Power-Related Topics. Discusses Power Budgeting and Power Management.
- Part 5: Optional Topics. Discusses the major features of PCI Express that are optional, including Hot Plug and Expansion Card implementation details.
- Part 6: PCI Express Configuration. Discusses the configuration process, accessing configuration space, and details the content and use of all configuration registers.
- Appendix:
- Test, Debug, and Verification
- Markets & Applications for the PCI Express™ Architecture
- Implementing Intelligent Adapters and Multi-Host Systems With PCI Express™ Technology
- PCI Express Class Codes
- Legacy Support for Locking
Documentation ConventionsPCI Express™
PCI Express™ is a trademark of the PCI SIG. This book takes the liberty of abbreviating PCI Express as "PCI-XP" primarily in illustration where limited space is an issue.
Hexadecimal Notation
All hex numbers are followed by a lower case "h." For example:
89F2BD02h
0111h
Binary Notation
All binary numbers are followed by a lower case "b." For example:
1000 1001 1111 0010b
01b
Decimal Notation
Number without any suffix are decimal. When required for clarity, decimal numbers are followed by a lower case "d." Examples:
9
15
512d
Bits Versus Bytes Notation
This book represents bit with lower case "b" and bytes with an upper case "B." For example:
Megabits/second = Mb/s
Megabytes/second = MB/s
Bit Fields
Groups bits are represented with the high-order bits first followed by the loworder bits and enclosed by brackets. For example:
7:0 = bits 0 through 7
Active Signal States
Signals that are active low are followed by #, as in PERST# and WAKE#. Active high signals have no suffix, such as POWERGOOD.
Visit Our Web Site
Our web site lists all of our courses and the delivery options available for each course:
Information on MindShare courses:
- Self-paced DVDs and CDs
- Live web-delivered classes
- Live on-site classes.
- Free short courses on selected topics
- Technical papers
- Errata for a number of our books
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